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Volumn , Issue , 1982, Pages 200-204
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SELF-TESTING OF MULTICHIP LOGIC MODULES.
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NONE
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Author keywords
[No Author keywords available]
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Indexed keywords
LEVEL-SENSITIVE SCAN DESIGN;
LSSD SELF-TEST;
MISR/PARALLEL SRSG;
RANDOM TEST SOCKET;
RANDOM TESTING;
LOGIC DESIGN;
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EID: 0020259648
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (194)
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References (0)
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