Memory-efficient and high-performance 2-D DCT and IDCT processors based on CORDIC rotation

WSEAS Transactions on Electronics

Volumn 3, Issue 12, 2006, Pages 565-574

  Sung, Tze Yun ^a  

^a CHUNG HUA UNIVERSITY   (Taiwan)

Author keywords

CORDIC; DCT; IDCT; Low power; Pipelined architecture

Indexed keywords

ADDERS; ALGORITHMS; DIGITAL ARITHMETIC; DISCRETE COSINE TRANSFORMS; TWO DIMENSIONAL;

INVERSE DISCRETE COSINE TRANSFORM (IDCT); KERNEL ARITHMETIC UNIT; PIPELINED ARCHITECTURE; SHIFTERS;

PROGRAM PROCESSORS;

EID: 39749182388     PISSN: 11099445     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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