Efficient VLSI implementations of fast multiplierless approximated DCT using parameterized hardware modules for silicon intellectual property design

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 52, Issue 8, 2005, Pages 1568-1579

  Hsiao, Shen Fu ^a   Hu, Yu Hen ^b   Juang, Tso Bing ^a,c   Lee, Chung Han ^a,d  

^a NATIONAL SUN YAT SEN UNIVERSITY   (Taiwan)

^b Wisconsin Electric Machines and Power Electronics Consortium   (United States)

^c Ta Jen Institute of Technology   (Taiwan)

^d NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

Author keywords

BinDCT; CORDIC; Discrete cosine transform (DCT); Integer DCT (IDCT); Shifted discrete Fourier transform (SDFT); Very large scale integration (VLSI) design

Indexed keywords

ADDERS; ALGORITHMS; COSINE TRANSFORMS; DISCRETE FOURIER TRANSFORMS; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT LAYOUT;

DISCRETE COSINE TRANSFORM (DCT); SHIFTED DISCRETE FOURIER TRANSFORM (SDFT);

VLSI CIRCUITS;

EID: 26444617595     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2005.851709     Document Type: Article

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