Split-gate Resurf Stepped Oxide (RSO) MOSFETs for 25V applications with record low gate-to-drain charge

Proceedings of the International Symposium on Power Semiconductor Devices and ICs

Volumn , Issue , 2007, Pages 61-64

  Goarin, P ^a   Koops, G E J ^a   Van Dalen, R ^a   Le Cam, C ^b   Saby, J ^c  

^a NXP SEMICONDUCTORS   (Netherlands)

^b NXP SEMICONDUCTORS   (France)

^c UNIVERSITÉ DE LYON   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; DRAIN CURRENT; ELECTRIC BREAKDOWN; ELECTRIC RESISTANCE; OXIDES;

GATE TO DRAIN CHARGE; RESURF STEPPED OXIDE (RSO) MOSFET DEVICES;

MOSFET DEVICES;

EID: 39749088797     PISSN: 10636854     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPSD.2007.4294932     Document Type: Conference Paper

References (11)

1. M.A.A. in't Zandt, E.A. Hijzen, R.J.E. Hueting and G.E.L Koops, "Record-low 4mQ.mm2 specific on-resistance for 20V Trench MOSFETs", ISPSD, pp. 683-685, 2003.
2. P. Goarin, R. van Dalen, G.E.J. Koops and C. Le Cam, "Power trench MOSFET with very low specific on-resistance for 25V applications", ESSDERC, pp. 274-277, 2006.
3. G.E.J. Koops, E.A. Hijzen, R.J.E Hueting, M.A.A. in't Zandt, "Resurf Stepped Oxide (RSO) MOSFET for 85V having a record-low specific on-resistance", ISPSD, pp.185-188, 2004.
4. M.A. Gajda, S.W. Hodgkiss, L.A. Mounfield, N.T. Irwin, G.E.L Koops, R. van Dalen, "Industrialisation of Resurf Stepped Oxide Technology for Power Transistors", ISPSD, pp. 109-112, 2006.
5. M. Kodama, E. Hayashi, Y. Nishibe and T. Uesugi, "Temperature characteristics of a new 100V rated power MOSFET, VLMOS (Vertical LOCOS MOS)", ISPSD, pp. 463-466, 2004.
6. A. Schlögl et al., "A new robust power MOSFET family m the voltage range 80V-150V with superior low RDSon, excellent switching properties and improved body diode", EPE 2005.
7. J. Zeng et al., "An Ultra Dense Trench-Gated Power MOSFET Technology Using a Self-Aligned Process", ISPSD, pp. 147-150, 2001.
8. M. Darwish et al., "A New Power W-Gated Trench MOSFET(WMOSFET) with High Switching Performance", ISPSD, pp. 24-27, 2003.
9. S. Matsunaga, M. Sawada, A. Sugi, K. Takagiwa and N. Fujishima, "Low Gate Charge 20V Class Trench-aligning Lateral Power MOSFET", ISPSD, pp. 329-332, 2006.
10. S.T. Peake, R. Grover, R. Farr, C. Rogers and G. Petkos, "Fully Self-Aligned Power Trench-MOSFET utilising 1μm Pitch and 0.2μm Trench width", ISPSD, pp. 29-32, 2002.
11. S. Ono, Y. Kawaguchi and A. Nakawaga, "30V New Fine Trench MOSFET with Ultra Low On-Resistance", ISPSD, pp. 28-31, 2003.