Experimental verification of a model based decomposition method for double dipole lithography

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5377, Issue PART 2, 2004, Pages 1225-1236

  Eurlings, M ^a   Hsu, S ^b   Hendrickx, E ^c   Op 'T Root, W ^d   Laidig, T ^b   Chiou, T ^e   Chen, A ^e   Chen, F ^b   Vandenberghe, G ^c   Finders, J ^a  

^a ASML   (Netherlands)

^b ASML US Inc   (United States)

^c IMEC   (Belgium)

^d EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

^e ASML Taiwan Ltd   (Taiwan)

Author keywords

CD uniformity; CDU; DDL; Design For Manufacturing; DFM; Double Dipole Lithography; Line Width Roughness; LWR; Mask decomposition; Waviness

Indexed keywords

ALGORITHMS; DECOMPOSITION; MATHEMATICAL MODELS; MICROELECTRONICS; OPTICAL DESIGN; OPTIMIZATION; SCANNING ELECTRON MICROSCOPY;

CRITICAL DIMENSION UNIFORMITY (CDU); DESIGN FOR MANUFACTURING (DFM); DOUBLE DIPOLE LITHOGRAPHY (DDL); LINE WIDTH ROUGHNESS (LWR); MASK DECOMPOSITION; WAVINESS;

PHOTOLITHOGRAPHY;

EID: 3843083858     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.535221     Document Type: Conference Paper

References (11)

1. Mark Eurlings et al. "0.11 um imaging in KrF lithography using dipole illumination", SPIE Vol. 4404, 2001
2. Stephen D. Hsu et al. "Dipole decomposition mask-design for full chip implementation at the 100 nm technology node and beyond", SPIE Vol 4691, 2002
3. J.A. Torres et al. "Model Assisted Double Dipole Decomposition, SPIE Vol. 4691,2002
4. S.D. Hsu et al. "65-nm fall-chip implementation using double dipole lithography". SPIE Vol. 5040, 2003
5. J. Finders et al. "Low-k1 imaging: how low can we go?", SPIE Vol 4226, 2000
6. L. W. Liebmann, et al. "Layout optimization at the pinnacle of optical lithography", Proc. SPIE Vol. 5042, 2003
7. R. Socha er al. "Forbidden pitches for 130 nm lithography and below", SPIE Vol. 4000,2000
8. T. B. Chiou et al., "The Magnitude of Potential Exposure-Tool- Induced Critical Dimension and Overlay Errors in Double Dipole Lithography for the 65-nm and 45-nm Technology Nodes," Digest of Papers of 2003 International Microprocesses and Nanotechnology Conference, pp. 32, 2003
9. E. Hendrickx, at al. "Optical extension techniques toward 45-nm node gate patterning using ArF lithography", SPIE Vol. 5377, 2004
10. J. Meessen et al. "Reduction of the Influence of Line Edge Roughness on CD SEM Measurements Using an Extended Measurement Box" Proceedings of ARCH Interface 2002 Microlithography Symposium
11. B. Streefkerk et al. "Extending optical lithography with immersion", SPIE Vol. 5377, 2004