Dipole decomposition mask-design for full chip implementation at the 100 nm technology node and beyond

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 4691, Issue 1, 2002, Pages 476-490

  Hsu, Stephen D ^a   Corcoran, Noel ^a   Eurlings, Mark ^b   Knose, William ^a   Laidig, Tom ^a   Wampler, Kurt E ^a   Roy, Sabita ^a   Shi, Xuelong ^a   Hsu, Michael ^a   Chen, J Fung ^a   Finders, Jo ^b   Socha, Robert J ^a   Dusa, Mircea ^a  

^a ASML US Inc   (United States)

^b ASML   (Netherlands)

Author keywords

Dipole mask decomposition; Model OPC; Overlapped process windows; Pattern fidelity error; Scattering bar

Indexed keywords

COMPUTER SIMULATION; DECOMPOSITION; INTEGRATED CIRCUIT MANUFACTURE; PHASE SHIFT; PHOTORESISTS; SEMICONDUCTOR DEVICE MANUFACTURE;

DIPOLE MASK DECOMPOSITION;

MASKS;

EID: 18644379512     PISSN: 0277786X     EISSN: None     Source Type: Journal    
DOI: 10.1117/12.474596     Document Type: Article

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