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Volumn 5040 I, Issue , 2003, Pages 215-231
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65nm full-chip implementation using double dipole lithography
a
a
ASML
(Netherlands)
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Author keywords
DDL; DDL mask decomposition; Double dipole lithography; Model OPC; Overlay; Pattern shielding; Resolution enhancement technique; RET; SB; Scattering bars
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Indexed keywords
ALGORITHMS;
COMPUTER SIMULATION;
DATA FLOW ANALYSIS;
INTEGRATED CIRCUIT LAYOUT;
KNOWLEDGE BASED SYSTEMS;
LIGHT SCATTERING;
MASKS;
OPTICAL VARIABLES MEASUREMENT;
STATIC RANDOM ACCESS STORAGE;
DOUBLE DIPOLE LITHOGRAPHY;
FULL CHIP APPLICATION;
PATTERN SHIELDING;
PHASE SHIFT MASK;
RESOLUTION ENHANCEMENT TECHNIQUE;
PHOTOLITHOGRAPHY;
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EID: 0141722453
PISSN: 0277786X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1117/12.485445 Document Type: Conference Paper |
Times cited : (26)
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References (9)
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