-
2
-
-
0015680909
-
Logical reversibility of computation
-
Bennett, C.H., 1973. Logical reversibility of computation. IBM J. Res. Dev., 17: 525-532.
-
(1973)
IBM J. Res. Dev
, vol.17
, pp. 525-532
-
-
Bennett, C.H.1
-
3
-
-
70350767761
-
Efficient adder circuits based on a conservative logic gate
-
April, Pittsburgh, PA, USA, pp
-
Bruce, J.W., M.A. Thornton, L. Shivakumariah, P.S. Kokate and X. Li, 2002. Efficient adder circuits based on a conservative logic gate. Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI 02), April, Pittsburgh, PA, USA., pp: 83-88.
-
(2002)
Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI 02)
, pp. 83-88
-
-
Bruce, J.W.1
Thornton, M.A.2
Shivakumariah, L.3
Kokate, P.S.4
Li, X.5
-
4
-
-
33748565611
-
A new approach to synthesize multiple output functions using reversible programmable logic array
-
Chowdhury, A.R., R. Nazmul and H.M.D. Hasan Babu, 2006. A new approach to synthesize multiple output functions using reversible programmable logic array. Proceeding 19th International Conference on VLSI Design (VLSID), 3 (7): 311-316.
-
(2006)
Proceeding 19th International Conference on VLSI Design (VLSID)
, vol.3
, Issue.7
, pp. 311-316
-
-
Chowdhury, A.R.1
Nazmul, R.2
Hasan Babu, H.M.D.3
-
5
-
-
0002433737
-
Quantum mechanical computers
-
Feynman, R., 1985. Quantum mechanical computers. Optics News, 11: 11-20.
-
(1985)
Optics News
-
-
Feynman, R.1
-
7
-
-
27944484878
-
On synthesis of 3*3 reversible logic functions
-
GU, M., G. Yang, X. Song and J. Sun, 2005. On synthesis of 3*3 reversible logic functions. Int. J. Comput. Math., 82 (4): 385-390.
-
(2005)
Int. J. Comput. Math
, vol.82
, Issue.4
, pp. 385-390
-
-
GU, M.1
Yang, G.2
Song, X.3
Sun, J.4
-
8
-
-
27944453694
-
On the realization of reversible full adder circuit
-
Dhaka, Bangladesh
-
Hasan Babu, H.M.D., M.D. Rafiqul Islam, A.R. Chowdhury and S.M.A. Chowdhury, 2003a. On the realization of reversible full adder circuit. International Conference on Computer and Information Technology, Dhaka, Bangladesh, 2: 880-883.
-
(2003)
International Conference on Computer and Information Technology
, vol.2
, pp. 880-883
-
-
Hasan Babu, H.M.D.1
Rafiqul Islam, M.D.2
Chowdhury, A.R.3
Chowdhury, S.M.A.4
-
9
-
-
84944327186
-
Reversible logic synthesis for minimization of full adder circuit
-
Belek Antalya, Turkey, pp
-
Hasan Babu, H.M.D., M.D. Rafiqul Islam, S.M.A. Chowdhury and A.R. Chowdbury, 2003b. Reversible logic synthesis for minimization of full adder circuit. Proceeding of the EuroMicro Symposium on Digital System Design (DSD), Belek Antalya, Turkey, pp: 50-54.
-
(2003)
Proceeding of the EuroMicro Symposium on Digital System Design (DSD)
, pp. 50-54
-
-
Hasan Babu, H.M.D.1
Rafiqul Islam, M.D.2
Chowdhury, S.M.A.3
Chowdbury, A.R.4
-
10
-
-
2342614733
-
Synthesis of full adder circuit using reversible logic
-
Mumbai, India, pp
-
Hasan Babu, H.M.D., M.D. Rafiqul Islam, S.M.A. Chowdbury and A.R. Chowdhury, 2004. Synthesis of full adder circuit using reversible logic. Proceedings 17th International Conference on VLSI Design (VLSI Design), Mumbai, India, pp: 757-760.
-
(2004)
Proceedings 17th International Conference on VLSI Design (VLSI Design)
, pp. 757-760
-
-
Hasan Babu, H.M.D.1
Rafiqul Islam, M.D.2
Chowdbury, S.M.A.3
Chowdhury, A.R.4
-
11
-
-
27944471818
-
-
Kolkata, India, pp
-
Hasan Babu, H.M.D. and A.R. Chowdhury, 2005. Design of a reversible binary coded decimal adder by using reversible 4-bit parallel adder. VLSI Design, Kolkata, India, pp: 255-260.
-
(2005)
Design of a reversible binary coded decimal adder by using reversible 4-bit parallel adder. VLSI Design
, pp. 255-260
-
-
Hasan Babu, H.M.D.1
Chowdhury, A.R.2
-
12
-
-
33947204351
-
Reverse engineering
-
Hayes, B., 2006. Reverse engineering. Am. Sci., 94 (2): 107-111.
-
(2006)
Am. Sci
, vol.94
, Issue.2
, pp. 107-111
-
-
Hayes, B.1
-
14
-
-
0000328287
-
Irreversibility and heat generation in the computing process
-
Landauer, R., 1961. Irreversibility and heat generation in the computing process. IBM J. Res. Dev., 5 (3): 183-191.
-
(1961)
IBM J. Res. Dev
, vol.5
, Issue.3
, pp. 183-191
-
-
Landauer, R.1
-
15
-
-
47049113014
-
Fault tolerant reversible circuits
-
October, Pacific Grove, CA, pp
-
Parhami, B., 2006. Fault tolerant reversible circuits. Proceeding 40th Asilomar Conference Signals, Systems and Computers, October, Pacific Grove, CA, pp: 1726-1729.
-
(2006)
Proceeding 40th Asilomar Conference Signals, Systems and Computers
, pp. 1726-1729
-
-
Parhami, B.1
-
16
-
-
25544459735
-
Reversible logic and quantum computers
-
Peres, A., 1985. Reversible logic and quantum computers. Phy. Rev., A 32: 3266-3276.
-
(1985)
Phy. Rev., A
, vol.32
, pp. 3266-3276
-
-
Peres, A.1
-
17
-
-
0013031351
-
A general decomposition for reversible logic
-
Starkville, pp
-
Perkowski, M., A. Al-Rabadi, P. Kerntopf, A. Buller, M. Chrzanowska-Jeske, A. Mishchenko, M. Azad Khan, A. Coppola, S. Yanushkevich, V. Shrnerko and L. Jozwiak, 2001. A general decomposition for reversible logic. Proc. RM, Starkville, pp: 119-138.
-
(2001)
Proc. RM
, pp. 119-138
-
-
Perkowski, M.1
Al-Rabadi, A.2
Kerntopf, P.3
Buller, A.4
Chrzanowska-Jeske, M.5
Mishchenko, A.6
Azad Khan, M.7
Coppola, A.8
Yanushkevich, S.9
Shrnerko, V.10
Jozwiak, L.11
-
18
-
-
37349037103
-
Reversible logic. Invited tutorial
-
Sep, Warsaw, Poland
-
Perkowski, M. and P. Kerntopf, 2001. Reversible logic. Invited tutorial. Proc. EURO-MICRO, Sep, Warsaw, Poland.
-
(2001)
Proc. EURO-MICRO
-
-
Perkowski, M.1
Kerntopf, P.2
-
20
-
-
33845188112
-
Novel reversible TSG gate and its application for designing reversible carry look ahead adder and other adder architectures
-
Proceedings of the 10th Asia-Pacific Computer Systems Architecture Conference ACSAC, Springer-Verlag
-
Thapliyal, H. and M.B. Srinivas, 2005. Novel reversible TSG gate and its application for designing reversible carry look ahead adder and other adder architectures. Proceedings of the 10th Asia-Pacific Computer Systems Architecture Conference (ACSAC). Lecture Notes of Computer Science, Springer-Verlag, 3740: 775-786.
-
(2005)
Lecture Notes of Computer Science
, vol.3740
, pp. 775-786
-
-
Thapliyal, H.1
Srinivas, M.B.2
-
21
-
-
84874667902
-
-
Toffoli, T., 1980. Reversible computing. Tech. Memo MIT/LCS/TM-151, MIT Lab. Comput. Sci.
-
Toffoli, T., 1980. Reversible computing. Tech. Memo MIT/LCS/TM-151, MIT Lab. Comput. Sci.
-
-
-
|