Fault-tolerant reversible circuits

Conference Record - Asilomar Conference on Signals, Systems and Computers

Volumn , Issue , 2006, Pages 1726-1729

  Parhami, Behrooz ^a  

^a University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; BIOINFORMATICS; CANNING; DIGITAL ARITHMETIC; ELECTRIC FAULT CURRENTS; FUZZY LOGIC; LOGIC DEVICES; LOGIC GATES; NETWORKS (CIRCUITS); QUANTUM COMPUTERS; SWITCHING CIRCUITS; SWITCHING THEORY;

ADDER CIRCUITS; CIRCUIT FAULTS; DESIGN STRATEGIES; DOUBLE GATE (DG); FAULT-TOLERANT; FREDKIN GATE (F GATE); INPUT SIGNALS; LOGIC SIGNALS; LOW-POWER DESIGNS; OPTICAL INFORMATION PROCESSING; PRIMARY OUTPUTS; QUANTUM COMPUTING; REVERSIBLE CIRCUITS; REVERSIBLE COMPUTATIONS; REVERSIBLE GATES; REVERSIBLE LOGIC GATES; REVERSIBLE LOGICS; SYNTHESIS STRATEGY;

LOGIC CIRCUITS;

EID: 47049113014     PISSN: 10586393     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ACSSC.2006.355056     Document Type: Conference Paper

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