A system approach for partially reconfigurable architectures

International Journal of Embedded Systems

Volumn 1, Issue 3-4, 2005, Pages 274-290

  Kalte, Heiko ^a   Kettelhoit, Boris ^b   Koester, Markus ^b   Porrmann, Mario ^b   Rückert, Ulrich ^b  

^a UNIVERSITY OF WESTERN AUSTRALIA   (Australia)

^b UNIVERSITY OF PADERBORN   (Germany)

Author keywords

1D placement; FPGA; partial reconfiguration; reconfigurable computing

Indexed keywords

EID: 34548724435     PISSN: 17411068     EISSN: 17411076     Source Type: Journal    
DOI: 10.1504/ijes.2005.009956     Document Type: Article

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