Low complexity LDPC code decoders for next generation standards

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2007, Pages 331-336

  Brack, T ^a   Alles, M ^a   Lehnigk Emden, T ^a   Kienle, F ^a   Wehn, N ^a   L'Insalata, N E ^b   Rossi, F ^b   Rovini, M ^b   Fanucci, L ^b  

^a University of Koblenz Landau   (Germany)

^b UNIVERSITY OF PISA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

APPROXIMATION THEORY; CMOS INTEGRATED CIRCUITS; COMPUTATIONAL COMPLEXITY; INTEGRATED CIRCUIT LAYOUT; STANDARDIZATION;

DESIGN SPACE SPANNING; LDPC CODES; STANDARDIZED CODES;

CODES (SYMBOLS);

EID: 34548336878     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2007.364613     Document Type: Conference Paper

References (22)

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