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CIXOB-k: Combined Input-Crosspoint-Output Buffered Switch
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Pipelined Multi-Queue Management in a VLSI ATM Switch Chip with Credit-Based Flow-Control
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University of Michigan, Ann Arbor, MI, USA, Sep 15-16
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The RR/RR CICQ Switch: Hardware Design for 10-Gbps Link Speed
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Reduced Complexity Input Buffered Switches
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Stanford University, Stanford, CA, Aug
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Motorola, C-5 Data-sheet: http://e-www.motorola.com/webapp/sps/site// taxonomy.jsp?nodeld=01DFTQ3126q62S
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C-5 Data-sheet
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Motorola1
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