TrueWay: A highly scalable multi-plane multi-stage buffered packet switch

2005 Workshop on High Performance Switching and Routing, HPSR 2005

Volumn , Issue , 2005, Pages 246-253

  Chao, H Jonathan ^a   Park, Jinsoo ^a   Artan, Sertac ^a   Jiang, Shi ^a   Zhang, Guansong ^b  

^a POLYTECHNIC UNIVERSITY   (United States)

^b Fortinet Inc   (United States)

Author keywords

Clos network; Multi plane switch; Packet switch

Indexed keywords

CLOS NETWORKS; MULTI-PLANE SWITCH; STATIC HASHING; SWITCH ARCHITECTURE;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; INTERFACES (COMPUTER); INTERNET; OPTICAL INTERCONNECTS; PACKET NETWORKS; SOFTWARE PROTOTYPING; TELECOMMUNICATION TRAFFIC;

PACKET SWITCHING;

EID: 27644474408     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. H. J. Chao, "Next Generation Routers," Invited Paper, Proceedings of the IEEE, Vol. 90, No. 9, Sep. 2002.
2. C. Clos, "A Study of Non-Blocking Switching Networks," Bell Sys. Tech. Jour., pp. 406-424, March 1953.
3. C.S. Chang, D.S. Lee, and Y.S Jou, "Load Balanced Birkhoff-von Neumann Switches, Part I: One-stage Buffering," Computer Communications, vol. 25 pp. 611-622, April 2002.
4. I. Keslassy, S.T. Chuang, K. Yu, D. Miller, M. Horowitz, O. Solgaard, and N. McKeown, "Scaling Internet Routers Using Optics," in ACM SIGCOMM Aug. 2003, Karlsruhe, Germany.
5. Cisco Systems, http://www.cisco.com/en/US/products/ps5763
6. H. T. Kung, Trevor Blackwell, and Alan Chapman, "Credit-Based Flow Control for ATM Networks: Credit Update Protocol, Adaptive Credit Allocation, and Statistical Multiplexing," in Proc. of ACM SIGCOMM, pp. 101-115, 1994.
7. Jung, Y.C.; Un, C.K.; Ryu, S.M.; Lee, S.C.; "Analysis of out-of-sequence problem and preventative schemes in parallel switch architecture for high-speed ATM network" Communications, IEE Proceedings, Volume: 141, Issue: 1, pp.29-38, Feb. 1994