An efficient implementation of fair load balancing over multi-CPU SOC architectures

Proceedings - Euromicro Symposium on Digital System Design, DSD 2003

Volumn , Issue , 2003, Pages 197-203

  Kornaros, G ^a   Orphanoudakis, T ^a   Zervos, N ^a  

^a Ellemedia Technologies   (Greece)

Author keywords

[No Author keywords available]

Indexed keywords

SYSTEM-ON-CHIP; SYSTEMS ANALYSIS;

EFFICIENT IMPLEMENTATION; EMERGING APPLICATIONS; MULTI-PROCESSOR PLATFORMS; MULTIPLE PROCESSING CORES; NETWORK PROCESSOR; OPTIMIZED IMPLEMENTATION; PROCESSING RESOURCES; SCHEDULED TRAFFICS;

BALANCING;

ENERGY CONSUMPTION; OPTIMIZATION;

EID: 84944322397     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2003.1231925     Document Type: Conference Paper

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