20 kA/cm 2 Process development for superconducting integrated circuits with 80 GHz clock frequency

IEEE Transactions on Applied Superconductivity

Volumn 17, Issue 2, 2007, Pages 946-951

  Tolpygo, Sergey K ^a,b   Yohannes, D ^a   Hunt, R T ^a   Vivalda, J A ^a   Donnelly, D ^a   Amparo, D ^a,b   Kirichenko, A F ^a  

^a HYPRES INC   (United States)

^b STONY BROOK UNIVERSITY   (United States)

Author keywords

Digital integrated circuits; Josephson device fabrication; Josephson junctions; Molybdenum nitride; Superconducting integrated circuits; Toggle flip flop

Indexed keywords

JOSEPHSON DEVICE FABRICATION; MOLYBDENUM NITRIDE; PROCESS DEVELOPMENT; SUPERCONDUCTING INTEGRATED CIRCUITS;

DIGITAL SIGNAL PROCESSING; JOSEPHSON JUNCTION DEVICES; MOLYBDENUM COMPOUNDS; NIOBIUM; PHOTOLITHOGRAPHY; RESISTORS; SUPERCONDUCTING ELECTRIC LINES;

DIGITAL INTEGRATED CIRCUITS;

EID: 34547460652     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/TASC.2007.898571     Document Type: Conference Paper

References (24)

1. O. A. Mukhanov, D. K. Brock, A. F. Kirichenko, W. Li, S. V. Rylov, J. M. Vogt, V. K. Semenov, T. V. Filippov, and Y. A. Polyakov, "Progress in the development of a superconductive high-resolution ADC," in Proc. 7th International Superconductive Electronics Conference ISEC'99, Berkeley, CA, USA, 1999, pp. 13-16.
2. O. A. Mukhanov, V. K. Semenov, I. V. Vernik, A. M. Kadin, T. V. Filippov, D. Gupta, D. K. Brock, I. Rochwarger, and Y. A. Polyakov, "High-resolution ADC operation up to 19.6 GHz clock frequency," Superconductor Science and Technology, vol. 14, pp. 1065-1070, November 2001.
3. M. Tanaka, T. Kondo, N. Nakajima, T. Kawamoto, Y. Yamanashi, Y. Kamiya, A. Akimoto, A. Fujimaki, H. Hayakawa, N. Yoshikawa, H. Terai, Y. Hashimoto, and S. Yorozu, "Demonstration of a single-flux-quantum. microprocessor using passive transmission lines," IEEE Trans. Appl. Supercond., vol. 15, pp. 400-404, June 2005.
4. L. S. Yu, C. J. Berry, R. E. Drake, K. Li, R. M. Patt, M. Radparvar, S. R. Whitley, and S. M. Faris, "An all-niobium eight level process for small, and medium scale integration," IEEE Trans. Mag., vol. 23, pp. 1476-1479, March 1987.
5. S. Nagasawa, Y. Hashimoto, H. Numata, and S. Tahara, "A 380 ps, 9.5 mV Josephson 4-Kbit RAM operated at a high bit yield," IEEE Trans. Appl. Supercond., vol. 5, no. 2, pp. 2447-2452, June 1995.
6. H. Numata and S. Tahara, "Fabrication technology for Nb integrated circuits," IEICE Trans. Electron., vol. E84-C, pp. 2-8, Jan. 2001.
7. W. Chen, A. V. Rylyakov, V. Patel, J. E. Lukens, and K. K. Likharev, "Superconductor digital frequency divider operating up to 750 GHz," Appl. Phys. Lett., vol. 73, pp. 2817-2819, November 1998.
8. W. Chen, A. V. Rylyakov, V. Patel, J. E. Lukens, and K. K. Likharev, "Rapid single flux quantum T-flip flop operating up to 770 GHz," IEEE Trans. Appl. Supercond., vol. 9, pp. 3212-3215, June 1999.
9. S. K. Tolpygo, D. A. Donnelly, R. T. Hunt, J. A. Vivalda, and D. Yohannes, "HYPRES' advanced fabrication processes for superconducting high speed digital electronics and quantum computing," presented at the Applied Superconductivity Conference, Jacksonville, FL, USA, August 2004, unpublished.
10. x/Nb fabrication process," IEEE Trans. Appl. Supercond., vol. 15, no. 2, pp. 90-93, June 2005.
11. A. F. Kirichenko, S. Sarwana, D. Gupta, and D. Yohannes, "Superconductor digital receiver components," IEEE Trans. Appl. Supercond., vol. 15, no. 2, pp. 249-254, June 2005.
12. I. V. Vernik, D. E. Kirichenko, T. V. Filippov, A. Talalaevskii, A. Sahu, A. Inamdar, A. F. Kirichenko, D. Gupta, and O. A. Mukhanov, "Superconducting high-resolution, low-pass analog-to-digital converters," IEEE Trans. Appl. Supercond., in ASC2006, paper 2EX04, submitted for publication.
13. D. Gupta, T. V. Filippov, A. F. Kirichenko, D. E. Kirichenko, I. V. Vernik, A. Sahu, S. Sarwana, P. Shevchenko, A. Talalaevskii, and O. A. Mukhanov, "Digital channelizing radio frequency receiver," IEEE Trans. Appl. Supercond., in ASC2006, paper 2EX01, submitted for publication.
14. G. L. Kerber, L. A. Abelson, K. Edwards, R. Hu, M. W. Johnson, M. L. Leung, and J. Luine, "Fabrication of high current density Nb integrated circuits using a self-aligned junction anodization process," IEEE Trans. Appl. Supercond., vol. 13, no. 2, pp. 82-86, June 2003.
15. S. Nagasawa, K. Hinode, T. Satoh, H. Akaike, Y. Kitagawa, and M. Hidaka, "Development of advanced Nb process for SFQ circuits," Physica C, vol. 412-414, pp. 1429-1436, June 2004.
16. 2), Process #03-10-45 [Online]. Available: www.hypres.com follow links to Foundry and Nb Process & Design Rules
17. D. Yohannes, A. F. Kirichenko, S. Sarwana, and S. K. Tolpygo, "Parametric testing of HYPRES superconducting integrated circuit fabrication process," IEEE Trans. Appl. Supercond., in ASC2006, paper 1EF05, submitted for publication.
18. D. K. Brock, A. M. Kadin, A. F. Kirichenko, O. A. Mukhanov, S. Sarwana, J. A. Vivalda, W. Chen, and J. E. Lukens, "Retargetting RSFQ cells to a submicron fabrication process," IEEE Trans. Appl. Supercond., vol. 11, pp. 369-372, March 2001.
19. D. Zinoviev and Y. A. Polyakov, "Octopux: An advanced automated setup for testing superconducting circuits," IEEE Trans. Appl. Supercond., vol. 7, pp. 3640-3643, June 1997.
20. Y. Hashimoto, S. Yorozu, Y. Kameda, A. Fujimaki, H. Terai, and N. Yoshikawa, "Implementation of a 4 × 4 switch with passive interconnects," IEEE Trans. Appl. Supercond., vol. 15, no. 2, pp. 356-359, June 2005.
21. S. Yorozu, Y. Kameda, Y. Hashimoto, H. Terai, A. Fujimaki, and N. Yoshikawa, "Progress of single flux quantum packet switch technology," IEEE Trans. Appl. Supercond., vol. 15, no. 2, pp. 411-414, June 2005.
22. Y. Kameda, S. Yorozu, Y. Hashimoto, H. Terai, A. Fujimaki, and N. Yoshikawa, "SFQ circuit design and test of crossbar switch scheduler," IEEE Trans. Appl. Supercond., vol. 15, no. 2, pp. 423-426, June 2005.
23. K. Fujiwara, N. Nakajima, T. Nishigai, M. Ito, N. Yoshikawa, A. Fujimaki, H. Terai, and S. Yorozu, "Error rate test of large-scale SFQ digital, circuit systems," IEEE Trans. Appl. Supercond., vol. 15, no. 2, pp. 427-430, June 2005.
24. H. Terai, Y. Hashimoto, S. Yorozu, A. Fujimaki, N. Yoshikawa, and Z. Wang, "The relationship between bit-error rate, operating speed and circuit scale of SFQ circuits," IEEE Trans. Appl. Supercond., vol. 15, no. 2, pp. 364-367, June 2005.