Implementation of a 4 × 4 switch with passive interconnects

IEEE Transactions on Applied Superconductivity

Volumn 15, Issue 2 PART I, 2005, Pages 356-359

  Hashimoto, Yoshihito ^a   Yorozu, Shinichi ^a   Kameda, Yoshio ^a   Fujimaki, Akira ^b   Terai, Hirotaka ^c   Yoshikawa, Nobuyuki ^d  

^a SUPERCONDUCTIVITY RESEARCH LABORATORY   (Japan)

^b NAGOYA UNIVERSITY   (Japan)

^c NATIONAL INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGY   (Japan)

^d YOKOHAMA NATIONAL UNIVERSITY   (Japan)

Author keywords

Integrated circuit; Interconnection; Passive transmission line; SFQ; Superconductor

Indexed keywords

ERROR ANALYSIS; INTEGRATED CIRCUITS; INTERCONNECTION NETWORKS; JITTER; JOSEPHSON JUNCTION DEVICES; PROBABILITY; SEMICONDUCTOR JUNCTIONS; SUPERCONDUCTING ELECTRIC LINES; SWITCHING CIRCUITS; THERMAL NOISE;

INTERCONNECTIONS; PASSIVE TRANSMISSION LINES (PTL); SINGLE-FLUX-QUANTUM (SQF); TIMING-ERROR PROBABILITY;

PASSIVE NETWORKS;

EID: 22044434302     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/TASC.2005.849835     Document Type: Conference Paper

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