The impact of 3-dimensional integration on the design of arithmetic units

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2006, Pages 4951-4954

  Puttaswamy, Kiran ^a   Loh, Gabriel H ^b  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^b Georgia Institute of Technology   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARITHMETIC FUNCTIONAL UNITS; LATENCY; SHIFTERS;

ADDERS; DELAY CONTROL SYSTEMS; ELECTRIC POWER UTILIZATION; GATE DIELECTRICS; THREE DIMENSIONAL;

INTEGRATION;

EID: 34547342591     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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