Memory technologies for mobile era

2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005

Volumn , Issue , 2005, Pages 7-11

  Kim, Kinam ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

DATA PROCESSING; MOBILE DEVICES; NAND CIRCUITS; PERSONAL COMPUTERS; SEMICONDUCTOR STORAGE;

MOBILE APPLIANCES; SEMICONDUCTOR MEMORY; VOLATILE MEMORIES;

MOBILE TELECOMMUNICATION SYSTEMS;

EID: 34250744672     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASSCC.2005.251776     Document Type: Conference Paper

References (15)

1. Kinam Kim and et al., "DRAM Technology perspective for Giga-bit era", IEEE Transaction of Electronic Devices, Vol.45, pp.598-608, March, 1998.
2. Kinam Kim and Gitae Jeong, "Memory Technologies in Nano-era: Challenges and Opportunities", ISSCC Dig. Tech. Papers, pp.576-577, 2005.
3. J.Y. Kim, and et al, "The breakthrough in data retention time of DRAM using Recess-Channel-Array Transistor(RCAT) for 88nm feature size and beyond", Dig. Tech. Papers, VLSI Technology Symposium, pp. 11-12, 2003.
4. Jaegoo Lee et al., "Robust memory cell capacitor using multi-stack storage node for high performance in 90 nm technology and beyond", Dig. Tech. Papers, VLSI Technology Symposium, pp. 57 - 58, 2003.
5. Hyungtak Kim et al., "70nm DRAM technology for DDR-3 application", Dig. Tech. Papers, VLSI-TSA, pp. 29 - 30, 2005.
6. 2, and SSTFT(Stacked Single-crystal Thin Film Transistor) for Ultra High Density SRAM", Dig. Tech. Papers, VLSI Technology Symposium, pp.228-229, 2004.
7. Jong-Ho Park et al., "8 Gb MLC (multi-level cell) NAND flash memory using 63 nm process technology", Technical Digest of IEDM, pp. 873 - 876, 2004.
8. J. D. Lee, et al., "Effects of floating-gate interference on NAND flash memory cell operation", Electron Device Letters, vol. 23, pp. 264-266, 2002.
9. Kinam Kim and et al., "The Future Prospect of Non-volatile Memory", Dig. Tech. Papers, VLSI-TSA, pp. 88-94, 2005.
10. 3 with TaN metal gate for multi-giga bit flash memories", Technical Digest of IEDM, pp. 613-616, 2003
11. Seung Jae Baik et al., "High speed and nonvolatile Si nanocrystal memory for scaled flash technology using highly field-sensitive tunnel barrier", Technical Digest of IEDM, pp. 22.3.1 - 22.3.4, 2003.
12. Kinam Kim and S.Y. Lee, "Innovation in 1T1C FRAM technologies for mass-productive mega-density and future high density FRAM", to appear in 2005 ISIF
13. Woo Yeong Cho and et al., "A 0.18 μm 3.0V 64Mb Non-volatile Phase-transition Random Access Memory (PRAM)", IEEE JSSC, vol., 40, no. 1, pp.293-300, 2005.
14. Su-Jin Ahn, et al., "Highly Reliable 50nm Contact Cell Technology for 256Mb PRAM", Dig. Tech. Papers, VLSI Technology Symposium, pp. 98-99, 2005.
15. Kinam Kim et al., "Future memory technology including emerging new memories", International Conference on Microelectronics, Volume 1, pp. 377 - 384, 2004.