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Volumn , Issue , 2006, Pages 281-284

Formal verification of analog and mixed signal designs: Survey and comparison

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DIGITAL CIRCUITS; ELECTRONIC EQUIPMENT; INTEGRATED CIRCUITS; INTERFACES (MATERIALS);

EID: 34250702093     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NEWCAS.2006.250926     Document Type: Conference Paper
Times cited : (16)

References (19)
  • 2
    • 0029487139 scopus 로고    scopus 로고
    • L. Hedrich and E. Barke, A Formal Approach to Nonlinear Analog Circuit Verification. IEEE/ACM Intl. Conference on CAD, November 1995: 123-127.
    • L. Hedrich and E. Barke, A Formal Approach to Nonlinear Analog Circuit Verification. IEEE/ACM Intl. Conference on CAD, November 1995: 123-127.
  • 3
    • 0012110703 scopus 로고    scopus 로고
    • L. Hedrich and E. Barke, A Formal Approach to Verification of Linear Analog Circuits with Parameter Tolerances. IEEE/ ACM Design, Automation and Test in Europe, 1998: 649-654.
    • L. Hedrich and E. Barke, A Formal Approach to Verification of Linear Analog Circuits with Parameter Tolerances. IEEE/ ACM Design, Automation and Test in Europe, 1998: 649-654.
  • 5
    • 0026260066 scopus 로고    scopus 로고
    • R.P. Kurshan and K.L. McMillan. Analysis of digital circuits through symbolic reduction. IEEE Trans, on Computer-Aided Design 10:13501371, 1991.
    • R.P. Kurshan and K.L. McMillan. Analysis of digital circuits through symbolic reduction. IEEE Trans, on Computer-Aided Design 10:13501371, 1991.
  • 6
    • 34250737218 scopus 로고    scopus 로고
    • Reachability Analysis Using Polygonal Projections
    • HSCC, LNCS 1569, springer: 103-116, 1999, HSCC, springer
    • Mark R. Greenstreet, lan Mitchell. Reachability Analysis Using Polygonal Projections. HSCC, LNCS 1569, springer: 103-116, 1999, HSCC, LNCS 1386, springer: 159-174, 1998.
    • (1998) LNCS , vol.1386 , pp. 159-174
    • Mark, R.1    Greenstreet2    lan Mitchell3
  • 7
    • 33750910730 scopus 로고    scopus 로고
    • Verification of analog and mixed-signal circuits using hybrid system techniques
    • Formal Methods in ComputerAided Design, springer
    • T. Dang, A. Douze, O. Maler: Verification of analog and mixed-signal circuits using hybrid system techniques. In: Formal Methods in ComputerAided Design, LNCS 3312, springer: 14-17, 2004.
    • (2004) LNCS , vol.3312 , pp. 14-17
    • Dang, T.1    Douze, A.2    Maler, O.3
  • 9
    • 33750904613 scopus 로고    scopus 로고
    • Formal Verification for Nonlinear Analog Systems: Approaches to Model and Equivalence Checking
    • Kluwer
    • W. Hartong, et al.: "Formal Verification for Nonlinear Analog Systems: Approaches to Model and Equivalence Checking," Advanced Formal Verification, Kluwer: 205-245, 2004,
    • (2004) Advanced Formal Verification , pp. 205-245
    • Hartong, W.1
  • 11
    • 33744755199 scopus 로고    scopus 로고
    • Verification of Analog and Mixed-Signal Circuits Using Timed Hybrid Petri Nets. ATVA, springer: 426-440
    • S. Little, et al.: Verification of Analog and Mixed-Signal Circuits Using Timed Hybrid Petri Nets. ATVA, LNCS 3299, springer: 426-440, 2004.
    • (2004) LNCS , vol.3299
    • Little, S.1
  • 13
    • 34250776389 scopus 로고    scopus 로고
    • Formal Verification of the Quasi-Static Behavior of Mixed-Signal Circuits by Property Checking
    • M. Freibothe, et al.: Formal Verification of the Quasi-Static Behavior of Mixed-Signal Circuits by Property Checking, Workshop on Formal Verification of Analog Circuits, 2005
    • (2005) Workshop on Formal Verification of Analog Circuits
    • Freibothe, M.1
  • 14
    • 27944453169 scopus 로고    scopus 로고
    • Monitoring Temporal Properties of Continuous Signals
    • FORMATS/FTRTFT, Springer
    • O. Maler, D. Nickovic: Monitoring Temporal Properties of Continuous Signals. FORMATS/FTRTFT, LNCS 3253, Springer: 152-166, 2004.
    • (2004) LNCS , vol.3253 , pp. 152-166
    • Maler, O.1    Nickovic, D.2
  • 16
    • 27944487131 scopus 로고    scopus 로고
    • A Verification System for Transient Response of Analog Circuits Using Model Checking
    • T. R. Dastidar, P. P. Chakrabarti: A Verification System for Transient Response of Analog Circuits Using Model Checking. VLSI Design: 195-200, 2005.
    • (2005) VLSI Design , pp. 195-200
    • Dastidar, T.R.1    Chakrabarti, P.P.2
  • 18
    • 0033876859 scopus 로고    scopus 로고
    • Reasoning About Analog-Level Implementations of Digital Systems
    • K. Hanna: Reasoning About Analog-Level Implementations of Digital Systems. Formal Methods in System Design 16(2): 127-158, 2000.
    • (2000) Formal Methods in System Design , vol.16 , Issue.2 , pp. 127-158
    • Hanna, K.1
  • 19
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    • Reasoning about Real Circuits
    • Springer
    • K. Hanna: Reasoning about Real Circuits. TPHOLs, LNCS 859, Springer: 235-253, 1994.
    • (1994) LNCS. TPHOLs , vol.859 , pp. 235-253
    • Hanna, K.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.