Formal approach to nonlinear analog circuit verification

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 1995, Pages 123-127

  Hedrich, Lars ^a   Barke, Erich ^a  

^a LEIBNIZ UNIVERSITY HANNOVER   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; DIFFERENTIAL EQUATIONS; ELECTRIC NETWORK ANALYSIS; INTEGRATED CIRCUIT LAYOUT; ITERATIVE METHODS; MATHEMATICAL MODELS; NONLINEAR EQUATIONS; STATE SPACE METHODS;

FORMAL VERIFICATION; NONLINEAR ANALOG CIRCUIT VERIFICATION;

INTEGRATED CIRCUITS;

EID: 0029487139     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)