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Volumn 36, Issue 6, 2007, Pages 690-696

Design of solder joint structure for flip chip package with an optimized shear test method

Author keywords

Finite element analysis; Flip chip; Optimization; Shear test; Solder

Indexed keywords

SHEAR FORCE; SHEAR SPEED; SHEAR TESTS; SOLDER BUMPS;

EID: 34249877158     PISSN: 03615235     EISSN: None     Source Type: Journal    
DOI: 10.1007/s11664-007-0140-6     Document Type: Article
Times cited : (8)

References (18)
  • 9
    • 34249879355 scopus 로고    scopus 로고
    • JESD22-B117, JEDEC Solid State Technology Association (USA), 2000.
    • JESD22-B117, JEDEC Solid State Technology Association (USA), 2000.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.