Integrated design method for flip chip CSP with electrical, thermal and thermo-mechanical qualifications

Finite Elements in Analysis and Design

Volumn 39, Issue 7, 2003, Pages 661-677

  Liu, De Shin ^a   Ni, Chin Yu ^a   Chen, Ching Yang ^a  

^a NATIONAL CHUNG CHENG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER PROGRAMMING; COMPUTER SOFTWARE; ELECTRIC POTENTIAL; ELECTRONICS PACKAGING; FINITE ELEMENT METHOD; GENETIC ALGORITHMS; HEAT RESISTANCE; MATHEMATICAL MODELS; OPTIMIZATION;

POWER DISSIPATION;

INTEGRATED CIRCUIT LAYOUT;

EID: 0037399882     PISSN: 0168874X     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0168-874X(02)00133-6     Document Type: Article

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