PIRATE: A framework for power/performance exploration of network-on-chip architectures

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3254, Issue , 2004, Pages 521-531

  Palermo, Gianluca ^a   Silvano, Cristina ^a  

^a POLITECNICO DI MILANO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; ECONOMIC AND SOCIAL EFFECTS; INTEGRATED CIRCUIT INTERCONNECTS; NETWORK ARCHITECTURE; PROGRAM PROCESSORS; SERVERS; TOPOLOGY; VLSI CIRCUITS;

CRYPTOGRAPHIC HARDWARE; DESIGN FRAMEWORKS; NETWORK TOPOLOGY; NETWORK-ON-CHIP ARCHITECTURES; ON-CHIP INTERCONNECTION NETWORK; PARAMETERIZED; TRADE OFF; WEB SERVER SYSTEM;

NETWORK-ON-CHIP;

EID: 34248557637     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-30205-6_54     Document Type: Article

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