0.5V, 400MHz, VDD-hopping processor with zero VTH FD-SOI technology

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2003, Pages

  Kawaguchi, Hiroshi ^a   Kanda, Kouichi ^a   Nose, Koichi ^b   Hattori, Sadaaki ^c   Antono, Danardono Dwi ^a   Yamada, Daisuke ^a   Miyazaki, Takayuki ^a   Inagaki, Kenichi ^a   Hiramoto, Toshiro ^a   Sakurai, Takayasu ^a  

^a UNIVERSITY OF TOKYO   (Japan)

^b NEC CORPORATION   (Japan)

^c KDDI CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

LEAKAGE CURRENTS; MOSFET DEVICES; POWER ELECTRONICS; RANDOM ACCESS STORAGE; VARIABLE FREQUENCY OSCILLATORS;

ARITHMETIC LOGIC UNIT; DRAIN INDUCED BARRIER LOWERING EFFECT; FULLY DEPLETED SILICON ON INSULATOR TECHNOLOGY; HOPPING PROCESSOR;

SILICON ON INSULATOR TECHNOLOGY;

EID: 0038645532     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

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2. DD-Hopping Scheme with Off-the-Shelf Processor and Its Application to MPEG4 System," IEICE T. Elec., vol. E85-C, no. 2, pp. 263-271, 2002.
3. H. Zhang, et al., "Low-Swing Interconnect Interface Circuits," ISLPED, pp. 161-166, 1998.
4. TH-Hopping Scheme to Reduce Subthreshold Leakage for Low-Power Processors," IEEE J. Solid State Circuits, vol. 37, no. 3, pp. 413-419, 2002.
5. K. Kanda, et al., "Design Impact of Positive Temperature Dependence on Drain Current in Sub-1V CMOS VLSIs," IEEE J. Solid State Circuits, vol. 36, no. 10, pp. 1559-1564, 2001.
6. N. D. Minh, et al., "Compact yet High-Performance (CyHP) Library for Short Time-to-Market with New Technologies," ASPDAC, pp. 475-480, 2000.