Enabling fine-grain leakage management by voltage anchor insertion

Proceedings -Design, Automation and Test in Europe, DATE

Volumn 1, Issue , 2006, Pages

  Babighian, Pietro ^a   Benini, Luca ^b   Macii, Alberto ^a   Macii, Enrico ^a  

^a POLITECNICO DI TORINO   (Italy)

^b UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POTENTIAL; LEAKAGE CURRENTS; LOGIC CIRCUITS; PROBLEM SOLVING;

INTERMEDIATE VOLTAGES; LEAKAGE MANAGEMENT; LEAKAGE REDUCTION; VOLTAGE ANCHOR INSERTION;

CMOS INTEGRATED CIRCUITS;

EID: 34047161904     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2006.243770     Document Type: Conference Paper

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