-
3
-
-
2942642080
-
Analysis of IP-Drop Scaling with Implications for Deep Submicron P/G Network Designs
-
San Jose, CA, pp, March
-
A. H. Ajami, K. Banerjee, A. Mehrotra and M. Pedram, "Analysis of IP-Drop Scaling with Implications for Deep Submicron P/G Network Designs," IEEE International Symposium on Quality Electronic Design (ISQED), San Jose, CA, pp. 35-40, March 2003.
-
(2003)
IEEE International Symposium on Quality Electronic Design (ISQED)
, pp. 35-40
-
-
Ajami, A.H.1
Banerjee, K.2
Mehrotra, A.3
Pedram, M.4
-
4
-
-
0035208728
-
Compact Modeling and SPICE-based Simulation for Electrothermal Analysis of Multilevel ULSI Inteconnects
-
T.-Y. Chiang, K. Banerjee, and K. Saraswat, "Compact Modeling and SPICE-based Simulation for Electrothermal Analysis of Multilevel ULSI Inteconnects," In Proceedings of the International Conference on Computer-Aided Design, pp. 165-172, 2001.
-
(2001)
Proceedings of the International Conference on Computer-Aided Design
, pp. 165-172
-
-
Chiang, T.-Y.1
Banerjee, K.2
Saraswat, K.3
-
5
-
-
4444374512
-
Compact Thermal Modeling for Temperature-Aware Design
-
June
-
W. Huang, M. Stan, K. Skadron, K. Sankaranarayanan, S. Ghosh, and S. Velusamy, "Compact Thermal Modeling for Temperature-Aware Design," In Proceedings of the Annual ACM/IEEE Design Automation Conference, June 2004.
-
(2004)
Proceedings of the Annual ACM/IEEE Design Automation Conference
-
-
Huang, W.1
Stan, M.2
Skadron, K.3
Sankaranarayanan, K.4
Ghosh, S.5
Velusamy, S.6
-
8
-
-
34047138094
-
-
http://www.simplescalar.com/.
-
-
-
-
9
-
-
4043167721
-
Low-Power Instruction Bus Encoding for Embedded Processors
-
August
-
P. Petrov and A.Orailoglu, "Low-Power Instruction Bus Encoding for Embedded Processors," IEEE Trans. on VLSI, pp. 812-826, August 2004.
-
(2004)
IEEE Trans. on VLSI
, pp. 812-826
-
-
Petrov, P.1
Orailoglu, A.2
-
10
-
-
0030644909
-
Asymptotic Zero-Transition Activity Encoding for Address Buses in Low-Power Microprocessor-Based Systems
-
March
-
L. Benini, G. De Micheli, E. Macii, D. Sciuto and C. Silvano, "Asymptotic Zero-Transition Activity Encoding for Address Buses in Low-Power Microprocessor-Based Systems," IEEE 7th Great Lakes Symposium on VLSI, pp. 77-82, March 1997.
-
(1997)
IEEE 7th Great Lakes Symposium on VLSI
, pp. 77-82
-
-
Benini, L.1
De Micheli, G.2
Macii, E.3
Sciuto, D.4
Silvano, C.5
-
12
-
-
34047098081
-
Irredundant Address Bus Encoding Techniques based on Adaptive Codebooks for Low Power
-
Aug
-
S. Komatsu and M. Fujita, "Irredundant Address Bus Encoding Techniques based on Adaptive Codebooks for Low Power," International Symposium on Low Power Design, pp. 9-14, Aug 2001.
-
(2001)
International Symposium on Low Power Design
, pp. 9-14
-
-
Komatsu, S.1
Fujita, M.2
-
13
-
-
0038684860
-
Temperature-aware microarchitecture
-
June
-
K. Skadron, M. R. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan, and D. Tarjan, "Temperature-aware microarchitecture," Proc. ISCA-30, pp. 2-13, June 2003.
-
(2003)
Proc. ISCA-30
, pp. 2-13
-
-
Skadron, K.1
Stan, M.R.2
Huang, W.3
Velusamy, S.4
Sankaranarayanan, K.5
Tarjan, D.6
-
14
-
-
21644444692
-
Thermal Modeling, Characterization and Management of On-Chip Networks
-
Li Shang, Li-Shiuan Peh, Amit Kumar, and Niraj K. Jha, "Thermal Modeling, Characterization and Management of On-Chip Networks," Proceedings of the 37th International Symposium on Microarchitecture (MICRO), 2004
-
(2004)
Proceedings of the 37th International Symposium on Microarchitecture (MICRO)
-
-
Shang, L.1
Peh, L.2
Kumar, A.3
Jha, N.K.4
-
16
-
-
34047144099
-
-
http://www-device.eecs.berkeley.edu/~ptm.
-
-
-
-
17
-
-
0034452632
-
Full Chip Thermal Analysis of Planar (2-D) and Vertically Integrated (3-D) High Performance ICs
-
S. Im and K. Banerjee, "Full Chip Thermal Analysis of Planar (2-D) and Vertically Integrated (3-D) High Performance ICs," In Proceedings of the IEDM, pp. 727-730, 2000.
-
(2000)
Proceedings of the IEDM
, pp. 727-730
-
-
Im, S.1
Banerjee, K.2
-
18
-
-
0034819419
-
Analysis and Optimization of Thermal Issues in High-Performance VLSI
-
April
-
Kaustav Banerjee, Massound Pedram, and Amir H. Ajami, " Analysis and Optimization of Thermal Issues in High-Performance VLSI," In ACM/SIGDA International Symposium on Physical Design (ISPD), pp. 230-237, April, 2001.
-
(2001)
ACM/SIGDA International Symposium on Physical Design (ISPD)
, pp. 230-237
-
-
Banerjee, K.1
Pedram, M.2
Ajami, A.H.3
|