A high-speed fully-programmable VLSI decoder for regular LDPC codes

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 3, Issue , 2006, Pages

  Kim, Euncheol ^a   Jayakumar, Nikhil ^a   Bhagwat, Pankaj ^a   Selvarathinam, Anand ^a   Choi, Gwan ^a   Khatri, Sunil P ^a  

^a TEXAS A AND M UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CODE LENGTH; FABRICATION PROCESSES; LOW-DENSITY PARITY CHECK (LDPC) DECODERS; VARIABLE RATE CODES;

COMPUTER AIDED LOGIC DESIGN; COMPUTER ARCHITECTURE; INTEGRATED CIRCUIT LAYOUT; OPTICAL FIBER FABRICATION; REAL TIME CONTROL; THROUGHPUT; VLSI CIRCUITS;

DECODING;

EID: 33947703054     PISSN: 15206149     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (20)

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