High-throughput VLSI implementations of iterative decoders and related code construction problems

GLOBECOM - IEEE Global Telecommunications Conference

Volumn 1, Issue , 2004, Pages 361-365

  Nagarajan, Vijay ^a   Jayakumar, Nikhil ^b   Khatri, Sunil ^b   Milenkoviç, Olgica ^a  

^a UCB 450   (United States)

^b Texas AandM University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPROXIMATION THEORY; DECODING; GRAPH THEORY; INFORMATION THEORY; ITERATIVE METHODS; MICROPROCESSOR CHIPS; OPTIMIZATION; PROGRAMMABLE LOGIC CONTROLLERS; THROUGHPUT;

CODE CONSTRUCTION; LINEAR TIME-COMPLEXITY DECODING; LOW-DENSITY PARITY-CHECK (LDPC); STANDARD-CELL BASED ARCHITECTURES;

VLSI CIRCUITS;

EID: 18144419713     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/glocom.2004.1377970     Document Type: Conference Paper

References (10)

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