Low-loss patterned ground shield interconnect transmission lines in advanced IC processes

IEEE Transactions on Microwave Theory and Techniques

Volumn 55, Issue 3, 2007, Pages 561-570

  Tiemeijer, Luuk F ^a   Pijper, Ralf M T ^a   Havens, Ramon J ^a   Hubert, Olivier ^b  

^a NXP SEMICONDUCTORS   (Netherlands)

^b NXP SEMICONDUCTORS   (France)

Author keywords

Calibration; Deembedding; Integrated circuits (ICs); On chip interconnect transmission lines; On wafer microwave measurements

Indexed keywords

CALIBRATION; ELECTRIC IMPEDANCE; EQUIVALENT CIRCUITS; INTEGRATED CIRCUITS; INTERCONNECTION NETWORKS; MATHEMATICAL MODELS;

ATTENUATION LOSS; DEEMBEDDING; ON-CHIP INTERCONNECT TRANSMISSION LINES; ON-WAFER MICROWAVE MEASUREMENTS;

ELECTRIC LINES;

EID: 33847797114     PISSN: 00189480     EISSN: None     Source Type: Journal    
DOI: 10.1109/TMTT.2007.891691     Document Type: Article

References (22)

1. A. Deutsch, G. V. Kopcsay, P. Restle, H. H. Smith, G. Katopis, W. D. Becker, P. W. Coteus, C. W. Surovic, B. J. Rubin, R. P. Dunne, T. Gallo, K. A. Jenkins, L. M. Terman, R. H. Dennard, G. A. Sai-Halasz, B. L. Krauter, and D. R. Knebel, "When are transmission-line effects important for on-chip interconnections?," IEEE Trans. Microw. Theory Tech., vol. 45, no. 10, pp. 1836-1846, Oct. 1997.
2. T. Zwick, Y. Tretiakov, and D. Goren, "On-chip SiGe transmission line measurements and model verification up to 110 GHz," IEEE Microw. Wireless Compon. Lett., vol. 15, no. 2, pp. 65-567, Feb. 2005.
3. V. Milanovic, M. Ozgur, D. C. DeGroot, J. A. Jargon, M. Gaitan, and M. E. Zaghloul, "Characterization of broadband transmission for coplanar waveguides on CMOS silicon substrates," IEEE Trans. Microw. Theory Tech., vol. 46, no. 5, pp. 632-640, May 1998.
4. B. Kleveland, C. H. Diaz, D. Vook, L. Madden, T. H. Lee, and S. S. Wong, "Exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design," IEEE J. Solid-State Circuits, vol. 36, no. 10, pp. 1480-1488, Oct. 2001.
5. A. M. Mangan, S. P. Voinigescu, M.-T. Yang, and M. Tazlauanu, "deembedding transmission line measurements for accurate modeling of IC designs," IEEE Trans. Electron Devices, vol. 53, no. 2, pp. 235-241, Feb. 2006.
6. R. Lowther and S.-G. Lee, "On-chip interconnect lines with patterned ground shields," IEEE Microw. Guided Wave Lett., vol. 10, no. 2, pp. 49-51, Feb. 2000.
7. T. S. D. Cheung and J. R. Long, "Shielded passive devices for silicon-based monolithic microwave and millimeter-wave integrated circuits," IEEE J. Solid-State Circuits, vol. 41, no. 5, pp. 1183-1200, May 2006.
8. R. D. Lutz, V. K. Tripathi, and A. Weisshaar, "Enhanced transmission characteristics of on-chip interconnects with orthogonal gridded shield," IEEE Trans. Adv. Packag., vol. 24, no. 3, pp. 288-293, Aug. 2001.
9. P. Wang and E. C.-C. Kan, "High-speed interconnects with underlayer orthogonal metal grids," IEEE Trans. Adv. Packag., vol. 27, no. 3, pp. 497-507, Aug. 2004.
10. L. F. Tiemeijer, R. J. Havens, R. de Kort, Y. Bouttement, P. Deixler, and M. Ryczek, "Predictive spiral inductor compact model for frequency and time domain," in Proc. Int. Electron Device Meeting, 2003, pp. 875-878.
11. A. E. Ruehli, "Inductance calculations in a complex integrated circuit environment," IBM J. Res. Develop., pp. 470-481, 1972.
12. U. Choudhury and A. Sangiovanni-Vinticelli, "Automatic generation of analytical models for interconnect capacitances," IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 14, no. 4, pp. 470-480, Apr. 1995.
13. S. Ramo, J. R. Whinnery, and T. van Duzer, Fields and Waves in Communication Electronics. New York: Wiley, 1965, pp. 291-297.
14. H.-Y. Lee and T. Itoh, "Phenomenological loss equivalence method for planar quasi-TEM transmission lines with thin normal conductor or superconductor," IEEE Trans. Microw. Theory Tech., vol. 37, no. 12, pp. 1904-1909, Dec. 1989.
15. I. F. Chen, C. M. Peng, and C. W. Hsue, "Circuit-concept approach to radiated emissions of printed circuit boards," Proc. Inst. Elect. Eng. - Sci. Meas. Technol., vol. 151, no. 3, pp. 205-210, May 2004.
16. P. Deixler, T. Letavic, T. Mahatdejkul, Y. Bouttement, R. Brock, P. C. T. V. Saikumar, A. Rodriguez, R. Colclaser, P. Kellowan, H. Sun, N. Bell, D. Bower, A. Yao, R. van Langevelde, T. Vanhoucke, W. D. van Noort, G. A. M. Hurkx, D. Crespo, C. Biard, S. Bardy, and J. W. Slotboom, "QUBiC4plus: A cost-effective BiCMOS manufacturing technology with elite passive enhancements optimized for 'silicon-based' RF-system-in-package environment," in Proc. IEEE Bipolar/BiCMOS Circuits Technol. Meeting, Oct. 2005, pp. 272-275.
17. J. Kim, B. Jung, P. Cheung, and R. Harjani, "Novel CMOS low-loss transmission line structure," in Proc. IEEE Radio Wireless Conf., 2004, pp. 235-238.
18. M. C. A. M. Koolen, J. A. M. Geelen, and M. P. J. G. Versleijen, "An improved deembedding technique for on-wafer high frequency characterization, " in Proc. IEEE Bipolar/BiCMOS Circuits Technol. Meeting, Sep. 1991, pp. 188-191.
19. J. Song, F. Ling, G. Flynn, W. Blood, and E. Demircan, "A deem-bedding technique for interconnects," Elect. Performance Electron. Packag., pp. 129-132, Oct. 2001.
20. W. R. Eisenstadt and Y. Eo, "S-parameter-based IC interconnect transmission line characterization," IEEE Trans. Compon., Hybrids, Manuf. Technol., vol. 15, no. 4, pp. 483-489, Aug. 1992.
21. L. F. Tiemeijer, R. J. Havens, R. de Kort, A. J. Scholten, R. van Langevelde, D. B. M. Klaassen, G. T. Sasse, Y. Bouttement, C. Petot, S. Bardy, D. Gloria, P. Scheer, S. Boret, B. Van Haaren, C. Clement, J.-F. Larchanche, I.-S. Lim, A. Zlotnicka, and A. Duvallet, "Record RF performance of standard 90 nm CMOS technology," in Proc. Int. Electron Device Meeting, 2004, pp. 441-444.
22. G. Zhong and C.-K. Koh, "Exact closed-form formula for partial mutual inductances of rectangular conductors," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 50, no. 10, pp. 1349-1353, Oct. 2003.