-
1
-
-
20144387099
-
"CMOS vertical multiple independent gate field effect transistor (MIGFET)"
-
in Oct
-
L. Mathew et al., "CMOS vertical multiple independent gate field effect transistor (MIGFET)," in Proc. IEEE Int. SOI Conf., Oct. 2004, pp. 187-189.
-
(2004)
Proc. IEEE Int. SOI Conf.
, pp. 187-189
-
-
Mathew, L.1
-
2
-
-
26244446788
-
"Demonstration, analysis, and device design considerations for independent DG MOSFETs"
-
Sep
-
M. Masahara et al., "Demonstration, analysis, and device design considerations for independent DG MOSFETs," IEEE Trans. Electron Devices, vol. 52, no. 9, pp. 2046-2053, Sep. 2005.
-
(2005)
IEEE Trans. Electron Devices
, vol.52
, Issue.9
, pp. 2046-2053
-
-
Masahara, M.1
-
3
-
-
33947421763
-
"Physical insights regarding design and performance of independent-gate FinFETs"
-
Oct
-
W. Zhang, J. G. Fossum, L. Mathew, and Y. Du, "Physical insights regarding design and performance of independent-gate FinFETs," IEEE Trans. Electron Devices, vol. 52, no. 10, pp. 2198-2206, Oct. 2005.
-
(2005)
IEEE Trans. Electron Devices
, vol.52
, Issue.10
, pp. 2198-2206
-
-
Zhang, W.1
Fossum, J.G.2
Mathew, L.3
Du, Y.4
-
4
-
-
21044447633
-
"On the feasibility of nanoscale triple-gate CMOS ransistors"
-
Jun
-
J.-W. Yang and J. G. Fossum, "On the feasibility of nanoscale triple-gate CMOS transistors," IEEE Trans. Electron Devices, vol. 52, no. 6, pp. 1159-1164, Jun. 2005.
-
(2005)
IEEE Trans. Electron Devices
, vol.52
, Issue.6
, pp. 1159-1164
-
-
Yang, J.-W.1
Fossum, J.G.2
-
5
-
-
1442360373
-
"A process/physics-based compact model for nonclassical CMOS device and circuit design"
-
Jun
-
J. G. Fossum, L. Ge, M.-H. Chiang, V. P. Trivedi, M. M. Chowdhury, L. Mathew, G. O.Workman, and B.-Y. Nguyen, "A process/physics-based compact model for nonclassical CMOS device and circuit design," Solid State Electron., vol. 48, no. 6, pp. 919-926, Jun. 2004.
-
(2004)
Solid State Electron.
, vol.48
, Issue.6
, pp. 919-926
-
-
Fossum, J.G.1
Ge, L.2
Chiang, M.-H.3
Trivedi, V.P.4
Chowdhury, M.M.5
Mathew, L.6
Workman, G.O.7
Nguyen, B.-Y.8
-
6
-
-
33845195065
-
"Recent upgrades and applications of UFDG"
-
in May
-
J. G. Fossum, V. P. Trivedi, M. M. Chowdhury, S.-H. Kim, and W. Zhang, "Recent upgrades and applications of UFDG," in Proc. Tech. Nanotechnol. Conf. (WCM), May 2006, pp. 674-679.
-
(2006)
Proc. Tech. Nanotechnol. Conf. (WCM)
, pp. 674-679
-
-
Fossum, J.G.1
Trivedi, V.P.2
Chowdhury, M.M.3
Kim, S.-H.4
Zhang, W.5
-
7
-
-
0029379215
-
"Physical subthreshold MOSFET modeling applied to viable design of deep-submicrometer fully-depleted SOI low-voltage CMOS technology"
-
Sep
-
P. C. Yeh and J. G. Fossum, "Physical subthreshold MOSFET modeling applied to viable design of deep-submicrometer fully-depleted SOI low-voltage CMOS technology," IEEE Trans. Electron Devices, vol. 42, no. 9, pp. 1605-1613, Sep. 1995.
-
(1995)
IEEE Trans. Electron Devices
, vol.42
, Issue.9
, pp. 1605-1613
-
-
Yeh, P.C.1
Fossum, J.G.2
-
8
-
-
23844491449
-
"Quantum-mechanical effects on the threshold voltage of undoped double-gate MOSFETs"
-
Aug
-
V. P. Trivedi and J. G. Fossum, "Quantum-mechanical effects on the threshold voltage of undoped double-gate MOSFETs," IEEE Electron Device Lett., vol. 26, no. 8, pp. 579-582, Aug. 2005.
-
(2005)
IEEE Electron Device Lett.
, vol.26
, Issue.8
, pp. 579-582
-
-
Trivedi, V.P.1
Fossum, J.G.2
-
9
-
-
0020830319
-
"Threshold voltage of thin-film silicon-on-insulator (SOI) MOSFETs"
-
Oct
-
H.-K. Lim and J. G. Fossum, "Threshold voltage of thin-film silicon-on-insulator (SOI) MOSFETs," IEEE Trans. Electron Devices, vol. ED-30, no. 10, pp. 1244-1251, Oct. 1983.
-
(1983)
IEEE Trans. Electron Devices
, vol.ED-30
, Issue.10
, pp. 1244-1251
-
-
Lim, H.-K.1
Fossum, J.G.2
-
10
-
-
0035250378
-
"Double-gate CMOS: Symmetrical - Versus asymmetrical-gate devices"
-
Feb
-
K. Kim and J. G. Fossum, "Double-gate CMOS: Symmetrical - Versus asymmetrical-gate devices," IEEE Trans. Electron Devices, vol. 48, no. 2, pp. 294-299, Feb. 2001.
-
(2001)
IEEE Trans. Electron Devices
, vol.48
, Issue.2
, pp. 294-299
-
-
Kim, K.1
Fossum, J.G.2
-
11
-
-
16244397704
-
"Degradation of body factor (γ) of single gate fully depleted SOI MOSFETs due to short channel effects"
-
in Oct
-
A. Kumar, T. Nagumo, G. Tsutsui, and T. Hiramoto, "Degradation of body factor (γ) of single gate fully depleted SOI MOSFETs due to short channel effects," in Proc. IEEE Int. SOI Conf., Oct. 2004, pp. 58-59.
-
(2004)
Proc. IEEE Int. SOI Conf.
, pp. 58-59
-
-
Kumar, A.1
Nagumo, T.2
Tsutsui, G.3
Hiramoto, T.4
-
12
-
-
12444292832
-
"Nanoscale FD/SOI CMOS: Thick or Thin BOX?"
-
Jan
-
V. P. Trivedi, J. G. Fossum, "Nanoscale FD/SOI CMOS: Thick or Thin BOX?" IEEE Electron Device Lett., vol. 26, no. 1, pp. 26-28, Jan. 2005.
-
(2005)
IEEE Electron Device Lett.
, vol.26
, Issue.1
, pp. 26-28
-
-
Trivedi, V.P.1
Fossum, J.G.2
-
13
-
-
0141940117
-
"Scaling fully depleted SOI CMOS"
-
Oct
-
V. P. Trivedi, J. G. Fossum, "Scaling fully depleted SOI CMOS," IEEE Trans. Electron Devices, vol. 50, no. 10, pp. 2095-2103, Oct. 2003.
-
(2003)
IEEE Trans. Electron Devices
, vol.50
, Issue.10
, pp. 2095-2103
-
-
Trivedi, V.P.1
Fossum, J.G.2
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