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Volumn 2005, Issue , 2005, Pages 78-82

A multifunctional test chip for microelectronic packaging and its application on RF property measurements

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONIC STRUCTURE; MICROELECTRONICS; MICROPROCESSOR CHIPS; POLYSILICON; SENSORS;

EID: 33847325175     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EMAP.2005.1598239     Document Type: Conference Paper
Times cited : (3)

References (15)
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  • 2
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    • Off-Axis Sensor Rosette for Measurement of the Piezoresistive Coefficients of Silicon
    • Jaeger, R. C. et al, "Off-Axis Sensor Rosette for Measurement of the Piezoresistive Coefficients of Silicon," IEEE Tran. On Comp., Hybrids and Manu. Tech., Vol. 16, No. 8, pp. 925-930, 1993.
    • (1993) IEEE Tran. On Comp., Hybrids and Manu. Tech , vol.16 , Issue.8 , pp. 925-930
    • Jaeger, R.C.1
  • 4
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    • In-Situ Stress State Measurements During Chip-on-Board Assembly
    • Zou, Y. et al, "In-Situ Stress State Measurements During Chip-on-Board Assembly", IEEE Tran. on Electronic Packaging Manufacturing, Vol. 22, pp. 38-52, 1999.
    • (1999) IEEE Tran. on Electronic Packaging Manufacturing , vol.22 , pp. 38-52
    • Zou, Y.1
  • 5
    • 0028425947 scopus 로고    scopus 로고
    • Tsai, C. T., Package Inductance Characterization at High Frequencies, IEEE Transaction on Components, Packaging, and Manufacturing Technology, Part B, 17, No. 2, pp. 175-181, 1997.
    • Tsai, C. T., "Package Inductance Characterization at High Frequencies," IEEE Transaction on Components, Packaging, and Manufacturing Technology, Part B, Vol. 17, No. 2, pp. 175-181, 1997.
  • 6
    • 0030084701 scopus 로고    scopus 로고
    • Young, B., and Sparkman, A. K., Measurement of Package Inductance and Capacitance Matrices IEEE Transaction on Components, Packaging, and Manufacturing Technology, Part B, 19, No. 1, pp. 225-229, 1996.
    • Young, B., and Sparkman, A. K., "Measurement of Package Inductance and Capacitance Matrices" IEEE Transaction on Components, Packaging, and Manufacturing Technology, Part B, Vol. 19, No. 1, pp. 225-229, 1996.
  • 7
    • 0242527286 scopus 로고    scopus 로고
    • Advances RF Package Technologies for Next-Generation Wireless Communications Applications
    • Larson, L., and Jessie, D., "Advances RF Package Technologies for Next-Generation Wireless Communications Applications," IEEE Custom Integrated Circuits Conference, pp. 323-330, 2003.
    • (2003) IEEE Custom Integrated Circuits Conference , pp. 323-330
    • Larson, L.1    Jessie, D.2
  • 10
    • 0008148421 scopus 로고
    • Guideline for Measurement of Electronic package Inductance and capacitance Model Parameters
    • EIA/JEP 123
    • "Guideline for Measurement of Electronic package Inductance and capacitance Model Parameters," EIA/JEP 123, 1995.
    • (1995)
  • 11
    • 0035521104 scopus 로고    scopus 로고
    • Electrical Performance Improvements on RFICs Using Bump Chip Carrier Packages as Compared to Standard Thin Shrink Small Outline Packages
    • Horng, T. S., Wu, S. M., Chiu, C. T., and Hung, C. P., "Electrical Performance Improvements on RFICs Using Bump Chip Carrier Packages as Compared to Standard Thin Shrink Small Outline Packages," IEEE Transactions on Advanced Packaging, Vol. 24, No.4, pp. 548-554, 2001.
    • (2001) IEEE Transactions on Advanced Packaging , vol.24 , Issue.4 , pp. 548-554
    • Horng, T.S.1    Wu, S.M.2    Chiu, C.T.3    Hung, C.P.4
  • 12
    • 0030148985 scopus 로고    scopus 로고
    • Tsai, C. T., and Yip, W. Y., An Experimental Technique for Full Package Inductance Matrix Characterization, IEEE Transaction on Components, Packaging, and Manufacturing Technology, Part B, 19 No. 2, pp. 338-343, 1996.
    • Tsai, C. T., and Yip, W. Y., "An Experimental Technique for Full Package Inductance Matrix Characterization," IEEE Transaction on Components, Packaging, and Manufacturing Technology, Part B, Vol. 19 No. 2, pp. 338-343, 1996.
  • 13
    • 0008148421 scopus 로고
    • Guideline for Measurement of Electronic package Inductance and capacitance Model Parameters
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  • 14
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    • A Circuit Topology for Microwave Modeling of Plastic Surface Mount Packages
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    • Jackson, R.W.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.