-
1
-
-
0026942779
-
Three-dimensional interconnect analysis using partial element equivalent circuits
-
Nov.
-
H. Heeb and A. Ruehli, "Three-dimensional interconnect analysis using partial element equivalent circuits," IEEE Trans. Circuits Syst.-Part I: Fund. Theory Appl., pp. 974-982, Nov. 1992.
-
(1992)
IEEE Trans. Circuits Syst.-Part I: Fund. Theory Appl.
, pp. 974-982
-
-
Heeb, H.1
Ruehli, A.2
-
2
-
-
0028112881
-
Handling of mutual inductance in simulation of simultaneous switching noise
-
A. Nakamura et al., "Handling of mutual inductance in simulation of simultaneous switching noise," in Proc. 44th ECTC, 1994, pp. 663-668.
-
(1994)
Proc. 44th ECTC
, pp. 663-668
-
-
Nakamura, A.1
-
3
-
-
33748869598
-
Electrical design of a 383PPGA for low voltage swing CMOS transceiver (GTL)
-
L. Yuan and C. Cheng, "Electrical design of a 383PPGA for low voltage swing CMOS transceiver (GTL)," in Proc. 1993 IEPS, 1993, pp. 656-662.
-
(1993)
Proc. 1993 IEPS
, pp. 656-662
-
-
Yuan, L.1
Cheng, C.2
-
5
-
-
33748847825
-
Electrical characterization of PGA design for submicron CMOS applications: Simulation and measurement
-
C. Kryzak, D. Dokos, M. Sanford, and J. Weiss, "Electrical characterization of PGA design for submicron CMOS applications: Simulation and measurement," in Proc. 1990 IEPS, 1990, pp. 263-271.
-
(1990)
Proc. 1990 IEPS
, pp. 263-271
-
-
Kryzak, C.1
Dokos, D.2
Sanford, M.3
Weiss, J.4
-
6
-
-
0023379192
-
Signal degradation through module pins in VLSI packaging
-
July
-
C.-C. Huang and L. L. Wu, "Signal degradation through module pins in VLSI packaging," IBM J. Res. Develop., pp. 489-498, July 1987.
-
(1987)
IBM J. Res. Develop.
, pp. 489-498
-
-
Huang, C.-C.1
Wu, L.L.2
-
7
-
-
0027238002
-
High-density integrated circuit design: Simultaneous switching ground/power noises calculation for pin grid array packages
-
M. Bedouani, "High-density integrated circuit design: Simultaneous switching ground/power noises calculation for pin grid array packages," in Proc. 43rd ECTC, 1993, pp. 1039-1044.
-
(1993)
Proc. 43rd ECTC
, pp. 1039-1044
-
-
Bedouani, M.1
-
8
-
-
33748849166
-
Electrical modeling program for high-performance IC packaging - The study of logic circuit behavior (propagation delay, rise time, and fall time) with respect to delta-I noise
-
A. T. Mu, "Electrical modeling program for high-performance IC packaging - The study of logic circuit behavior (propagation delay, rise time, and fall time) with respect to delta-I noise," in Proc. 1989 IEPS, 1989, pp. 359-364.
-
(1989)
Proc. 1989 IEPS
, pp. 359-364
-
-
Mu, A.T.1
-
10
-
-
0026835119
-
S-parameter analysis of multiconductor, integrated circuit interconnect systems
-
Mar.
-
B. J. Cooke, J. L. Prince, and A. C. Cangellaris, "S-parameter analysis of multiconductor, integrated circuit interconnect systems," IEEE Trans. Computer-Aided Design, pp. 353-360, Mar. 1992.
-
(1992)
IEEE Trans. Computer-Aided Design
, pp. 353-360
-
-
Cooke, B.J.1
Prince, J.L.2
Cangellaris, A.C.3
-
11
-
-
0018433295
-
Experimental characterization of multiconductor transmission lines in the frequency domain
-
Feb.
-
A. K. Agrawal, K.-M. Lee, L. D. Scott, and H. M. Howles, "Experimental characterization of multiconductor transmission lines in the frequency domain," IEEE Trans. Electromagnetic Compat., pp. 20-27, Feb. 1979.
-
(1979)
IEEE Trans. Electromagnetic Compat.
, pp. 20-27
-
-
Agrawal, A.K.1
Lee, K.-M.2
Scott, L.D.3
Howles, H.M.4
-
12
-
-
0014564143
-
Characterization of multiple parallel transmission lines using time domain reflectometry
-
Sept.
-
V. L. Carey, T. R. Scott, and W. T. Weeks, "Characterization of multiple parallel transmission lines using time domain reflectometry," IEEE Trans. Instrum. Meas., pp. 166-171, Sept. 1969.
-
(1969)
IEEE Trans. Instrum. Meas.
, pp. 166-171
-
-
Carey, V.L.1
Scott, T.R.2
Weeks, W.T.3
-
13
-
-
0018434240
-
Experimental characterization of multiconductor transmission lines in inhomogeneous media using time-domain techniques
-
Feb.
-
A. K. Agrawal, H. M. Fowles, and L. D. Scott, "Experimental characterization of multiconductor transmission lines in inhomogeneous media using time-domain techniques," IEEE Trans. Electromagnetic Compat., pp. 28-32, Feb. 1979.
-
(1979)
IEEE Trans. Electromagnetic Compat.
, pp. 28-32
-
-
Agrawal, A.K.1
Fowles, H.M.2
Scott, L.D.3
-
14
-
-
0028494638
-
Characterization and modeling of multiple line interconnections from time domain measurements
-
Sept.
-
L. A. Hayden and V. J. Tripathi, "Characterization and modeling of multiple line interconnections from time domain measurements," IEEE Trans. Microwave Theory Tech., pp. 1737-1743, Sept. 1994.
-
(1994)
IEEE Trans. Microwave Theory Tech.
, pp. 1737-1743
-
-
Hayden, L.A.1
Tripathi, V.J.2
-
15
-
-
0025536171
-
Capacitance: Relationships and measurements
-
R. E. Canright, "Capacitance: Relationships and measurements," in Proc. 40th ECTC, 1990, pp. 163-168.
-
(1990)
Proc. 40th ECTC
, pp. 163-168
-
-
Canright, R.E.1
-
16
-
-
0025498540
-
Measurement of R, L, and C parameters in VLSI packages
-
Oct.
-
D. W. Quint, A. Aziz, R. Kaw, and F. J. Perezalonso, "Measurement of R, L, and C parameters in VLSI packages," Hewlett-Packard J., pp. 73-77, Oct. 1990.
-
(1990)
Hewlett-Packard J.
, pp. 73-77
-
-
Quint, D.W.1
Aziz, A.2
Kaw, R.3
Perezalonso, F.J.4
-
17
-
-
0026618461
-
Short-pulse propagation technique for characterizing resistive package interconnection
-
A. Deutsch, G. Arjavalingham, G. V. Kopcsay, and M. Degerstrom, "Short-pulse propagation technique for characterizing resistive package interconnection," in Proc. 42nd ECTC, 1992, pp. 736-739.
-
(1992)
Proc. 42nd ECTC
, pp. 736-739
-
-
Deutsch, A.1
Arjavalingham, G.2
Kopcsay, G.V.3
Degerstrom, M.4
-
18
-
-
0024887602
-
Accurate measurement of high-speed package and interconnect parasitics
-
D. E. Carlton, K. R. Gleason, K. Jones, and E. W. Strid, "Accurate measurement of high-speed package and interconnect parasitics," in Japan IEMT Symp. Digest, 1989, pp. 276-279.
-
(1989)
Japan IEMT Symp. Digest
, pp. 276-279
-
-
Carlton, D.E.1
Gleason, K.R.2
Jones, K.3
Strid, E.W.4
-
19
-
-
33748847612
-
Ceramic package with 7.6 GHz bandwidth for high-speed LSI chips
-
Jan.
-
Y. Takahashi et al., "Ceramic package with 7.6 GHz bandwidth for high-speed LSI chips," Sumitomo Electric Tech. Rev., pp. 256-261, Jan. 1990.
-
(1990)
Sumitomo Electric Tech. Rev.
, pp. 256-261
-
-
Takahashi, Y.1
-
20
-
-
0022314480
-
Electrical characterization of packages for high-speed integrated circuits
-
Dec.
-
C. J. Stanghan and B. M. MacDonald, "Electrical characterization of packages for high-speed integrated circuits," IEEE Trans. Comp., Hybrids, Manufact. Technol., pp. 468-473, Dec. 1985.
-
(1985)
IEEE Trans. Comp., Hybrids, Manufact. Technol.
, pp. 468-473
-
-
Stanghan, C.J.1
MacDonald, B.M.2
-
21
-
-
33748863840
-
High frequency package electrical characterization: Meeting the challenge
-
T. S. Tarter and W. Beale, "High frequency package electrical characterization: Meeting the challenge," in Proc. 1992 IEPS, 1992, pp. 1164-1185.
-
(1992)
Proc. 1992 IEPS
, pp. 1164-1185
-
-
Tarter, T.S.1
Beale, W.2
-
22
-
-
0024946626
-
A new technique for measuring the inductance of pin grid array packages
-
L. E. Mosley, D. Mallik, and B. K. Bhattacharyya, "A new technique for measuring the inductance of pin grid array packages," in Japan IEMT Symp. Digest, 1989, pp. 280-285.
-
(1989)
Japan IEMT Symp. Digest
, pp. 280-285
-
-
Mosley, L.E.1
Mallik, D.2
Bhattacharyya, B.K.3
-
23
-
-
33748868035
-
Electrical properties of aluminum coated fine pitch lead frame for high-pin-count ceramic quad flat package
-
S. Yamanaka, T. Naida, and T. Ihara, "Electrical properties of aluminum coated fine pitch lead frame for high-pin-count ceramic quad flat package," in Proc. 1990 ISHM, 1990, pp. 626-631.
-
(1990)
Proc. 1990 ISHM
, pp. 626-631
-
-
Yamanaka, S.1
Naida, T.2
Ihara, T.3
-
24
-
-
33748861346
-
Electrical characterization of bonding wires
-
C.-T. Tsai, H. Anderson, and W.-Y. Yip, "Electrical characterization of bonding wires," in Proc. 1994 ISHM, 1994, pp. 479-484.
-
(1994)
Proc. 1994 ISHM
, pp. 479-484
-
-
Tsai, C.-T.1
Anderson, H.2
Yip, W.-Y.3
-
25
-
-
0027204523
-
High-frequency inductance measurements and characterization of Alloy-42 and copper packages
-
C.-T. Tsai et al., "High-frequency inductance measurements and characterization of Alloy-42 and copper packages," in Proc. 43rd ECTC, 1993, pp. 635-640.
-
(1993)
Proc. 43rd ECTC
, pp. 635-640
-
-
Tsai, C.-T.1
-
26
-
-
0028425947
-
Package inductance characterization at high frequencies
-
May
-
C.-T. Tsai, "Package inductance characterization at high frequencies," IEEE Trans. Comp., Packag., Manufact. Technol., pp. 175-181, May 1994.
-
(1994)
IEEE Trans. Comp., Packag., Manufact. Technol.
, pp. 175-181
-
-
Tsai, C.-T.1
-
27
-
-
33748855482
-
Characterization and modeling of pin grid array (PGA) packages
-
J. Williams and E. Godshalk, "Characterization and modeling of pin grid array (PGA) packages," in Proc. 1992 ISHM, 1992, pp. 623-628.
-
(1992)
Proc. 1992 ISHM
, pp. 623-628
-
-
Williams, J.1
Godshalk, E.2
-
28
-
-
33748871799
-
Improved techniques for characterization of high-speed packaging
-
J. Williams, K. Smith, and E. Godshalk, "Improved techniques for characterization of high-speed packaging," in Proc. 1991 ISHM, 1991, pp. 262-266.
-
Proc. 1991 ISHM
, vol.1991
, pp. 262-266
-
-
Williams, J.1
Smith, K.2
Godshalk, E.3
-
29
-
-
0027798939
-
High-speed VLSI interconnect modeling based on 5-parameter measurements
-
Aug.
-
Y. Eo and W. R. Eisenstadt, "High-speed VLSI interconnect modeling based on 5-parameter measurements," IEEE Trans. Comp., Hybrids, Manufact. Technol., pp. 555-562, Aug. 1993.
-
(1993)
IEEE Trans. Comp., Hybrids, Manufact. Technol.
, pp. 555-562
-
-
Eo, Y.1
Eisenstadt, W.R.2
-
30
-
-
0001032562
-
Inductance calculations in a complex integrated circuit environment
-
Sept.
-
A. E. Ruehli, "Inductance calculations in a complex integrated circuit environment," IBM J. Res. Develop., pp. 470-481, Sept. 1972.
-
(1972)
IBM J. Res. Develop.
, pp. 470-481
-
-
Ruehli, A.E.1
|