Identification of systematic yield limiters in complex asics through volume structural test fail data visualization and analysis

Proceedings - International Test Conference

Volumn 2005, Issue , 2005, Pages 137-145

  Schuermyer, C ^a   Cota, K ^a   Madge, R ^a   Benware, B ^a  

^a AGERE SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; DATA STRUCTURES; IDENTIFICATION (CONTROL SYSTEMS); SILICON WAFERS;

DESIGN PRACTICES; FAIL SIGNATURES; WAFER FABRICATION;

LIMITERS;

EID: 33847105027     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TEST.2005.1583970     Document Type: Conference Paper

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