Workload-ahead-driven online energy minimization techniques for battery-powered embedded systems with time-constraints

ACM Transactions on Design Automation of Electronic Systems

Volumn 12, Issue 1, 2007, Pages

  Cai, Yuan ^a,d   Schmitz, Marcus T ^b   Al Hashimi, Bashir M ^c   Reddy, Sudhakar M ^a,d  

^a UNIVERSITY OF IOWA   (United States)

^b ROBERT BOSCH GMBH   (Germany)

^c UNIVERSITY OF SOUTHAMPTON   (United Kingdom)

^d IA United States   (United States)

Author keywords

Adaptive body biasing; Battery; Dynamic voltage scaling; Embedded systems

Indexed keywords

EID: 33846951198     PISSN: 10844309     EISSN: 15577309     Source Type: Journal    
DOI: 10.1145/1217088.1217093     Document Type: Article

References (30)

1. AHMED, J. AND CHAKHABARTI, C. 2004. A dynamic task scheduling algorithm for battery powered DVS systems. In Proceedings of the International Symposium on Circuits and Systems. 813-816.
2. ANDREI, A., SCHMITZ, M. T., ELES, P., PENG, Z., AND AL-HASHIMI, B. M. 2004. Overhead-conscious voltage selection for dynamic and leakage energy reduction of time-constrained systems. In Proceedings of Design, Automation and Test in Europe Conference, 518-523.
3. ANDREI, A., SCHMITZ, M. T., ELES, P., PENG, Z., AND AL-HASHIMI, B. M. 2005. Quasi-static voltage scaling for energy minimization with time constraints. In Proceedings of Design, Automation and Test in Europe Conference, 514-519.
4. AYDIN, H., MELHEM, R., MOSSE, D., AND MEJIA-ALVAREZ, P. 2001. Dynamic and aggressive scheduling techniques for power-aware real-time systems. In Proceedings of Real-Time System Symposium, 95-105.
5. HOWDHURY, P. AND CHAKRABARTI, C. 2002. Battery aware task scheduling for a system-on-a-chip using voltage/clock scaling. In Proceedings of IEEE Workshop on Signal Processing Systems. IEEE Computer Society Press, Los Alamitos, CA, 201-206.
6. ICK, R. E 3s benchmark suite, http://www.ece.northwestern.edu/ dickrp/e 3s/.
7. KESHAVARZI, A., MA, S. N., BLOCECHEL, B., K. MISTRY, T. G., BORKARI, S., AND DE, V. 2001. Effectiveness of reverse body bias for leakage control in scaled dual-vt cmos ics. In Proceedings of International Symposium on Low Power Electronics and Design. 207-212.
8. TH scaling scheme for active leakage power reduction. In Proceedings of Design, Automation and Test in Europe Conference, 163-167.
9. KIM, W., SHIN, D., YUN, H. S., KIM, J., AND MIN, S. L. 2002. Performance comparison of dynamic voltage scaling algorithms for hard real-time systems. In Proceedings of IEEE Real-Time and Embedded Technology and Applications Symposium. IEEE Computer Society Press, Los Alamitos, CA, 219-228.
10. UO, J. AND JHA, N. K. 2001. Battery-aware static scheduling for distributed real-time embedded systems. In Proceedings of IEEE Design Automation Conference. IEEE Computer Society Press, Los Alamitos, CA, 444-449.
11. UO, J. AND JHA, N. K. 2002a. Low power distributed embedded systems: Dynamic voltage scaling and synthesis. In Proceedings of the International Conference on High Performance Computing.
12. UO, J. AND JHA, N. K. 2002b. Static and dynamic variable voltage scheduling algorithms for real-time heterogeneous distributed embedded systems. In Proceedings of Asia and South Pacific Design Automation Conference, 712-719.
13. ARTIN, S., FLAUTNER, K., MUDGE, T., AND BLAAUW, D. 2002. Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads. In Proceedings of IEEE / ACM International Conference on Computer-Aided Design. ACM, New York, 721-725.
14. IYAZAKI, M., ONO, G., AND NAGAMATSU, T. 2002. A 1.2-gips/w microprocessor using speed-adaptive threshold-voltage CMOS with forward bias. IEEE Trans. Solid-State Circ. 37, 2, 210-217.
15. OCHOCKI, B., HU, X. S., AND QUAN, G. 2005. Practical on-line DVS scheduling for fixed-priority real-time systems. In Proceedings of IEEE Real-Time and Embedded Technology and Applications Symposium. IEEE Computer Society Press, Los Alamitos, CA, 224-233.
16. PILLAI, P. AND SHIN, K. G. 2001. Real-time dynamic voltage scaling for low-power embedded operating systems. In Proceedings of ACM Symposium on Operating Systems Principles. ACM, New York, 89-102.
17. RAKHMATOV, D. AND VRUDHULA, S. 2003. Energy management for battery-powered embedded systems. ACM Trans. Embed. Comput. Syst. 2, 3, 277-324.
18. RAO, R., VRUDHULA, S., AND CHANG, N. 2005. Battery optimization vs energy optimization: Which to choose and when? In Proceedings of IEEE / ACM International Conference on Computer-Aided Design. ACM, New York, 438-444.
19. RAO, R., VRUDHULA, S., AND RAKHMATOV, D. 2003. Battery modeling for energy-aware system design. IEEE Comput. 36, 12, 77-87.
20. RHODES, D. AND DICK, R. Task graph for free (TGFF). http://ziyang.ece.northwestern.edu/tgff/.
21. SCHMITZ, C. GSM phone task graphs, http://kbs.cs.tu-berlin.de/ jutta/toast.html.
22. SCHMITZ, M. T. AND AL-HASHIMI, B. M. 2001. Considering power variations of DVS processing elements for energy minimization in distributed systems. In Proceedings of International Symposium on System Synthesis. 250-255.
23. SCHMITZ, M. T., AL-HASHIMI, B. M., AND ELES, P. 2002. Synthesizing energy-efficient embedded systems with lopocos. Des. Automat. Embed, Syst. 6, 401-424.
24. SHEN, C., RAMAMHITHAM, K., AND STANKOVIC, J. A. 1993. Resource reclaiming in multiprocessor real-time systems. IEEE Trans. Parall Dist. Syst. 4, 4, 382-397.
25. SHIN, D. AND KIM, J. 2001. A profile-based energy-efficient itra-task voltage scheduling algorithm for hard real-time applications. In Proceedings of International Symposium on Low Power Electronics and Design. 271-274.
26. WU, D., AL-HASHIMI, B. M., SCHMITZ, M. T., AND ELES, P. 2005. Power-composition profile driven co-synthesis with power management selection for dynamic and leakage energy reduction. In Proceedings of Euromicro Digital System Design, 34-41.
27. YAN, L., LUO, J., AND JHA, N. K. 2003. Combined dynamic voltage scaling and adaptive body biasing for heterogeneous distributed real-time embedded systems. In Proceedings of IEEE / ACM International Conference on Computer-Aided Design, ACM, New York, 30-37.
28. YE, W. AND ERNST, R. 1997. Embedded program timing analysis based on path clustering and architecture classification. In Proceedings of IEEE / ACM International Conference on Computer-Aided Design. ACM, New York, 598-604.
29. ZHU, D., MELHEM, R., AND CHILDERS, B. R. 2003. Scheduling with dynamic voltage/speed adjustment using slack reclamation in multi-processor real-time systems. IEEE Trans. Parall. Distrib. Syst. 14, 7, 686-700.
30. ZHU, Y. AND MUELLER, F. 2004. Feedback edf scheduling exploiting dynamic voltage scaling. In Proceedings of IEEE Real-Time and Embedded Technology and Applications Symposium. IEEE Computer Society Press, Los Alamitos, CA, 84-89.