A profile-based energy-efficient intra-task voltage scheduling algorithm for hard real-time applications

Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers

Volumn , Issue , 2001, Pages 271-274

  Shin, D ^a   Kim, J ^a  

^a Seoul National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; DECODING; DELAY CIRCUITS; ENERGY UTILIZATION; PROBABILITY; VOLTAGE CONTROL;

DYNAMIC VOLTAGE SCALING;

CMOS INTEGRATED CIRCUITS;

EID: 0034875746     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

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3. Voltage scheduling problem for dynamically variable voltage processors
4. Run-time voltage hopping for low-power real-time systems
5. Voltage-clock scaling for low energy consumption in real-time embedded systems
6. Alpha-power law MOSFET model and its application to CMOS inverter delay and other formulas
7. Intra-task voltage scheduling for low-energy hard real-time applications
8. Power conscious fixed priority scheduling for hard real-time systems
9. A scheduling model for reduced CPU energy