The effect of flux residue and substrate wettability on underfill flow process in flip chip packages

Proceedings - Electronic Components and Technology Conference

Volumn 2006, Issue , 2006, Pages 467-473

  Wang, Jinlin ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FLIP CHIP DEVICES; INTERFACIAL ENERGY; QUARTZ; STRESS ANALYSIS; SUBSTRATES; VISCOSITY; WETTING;

FLUX RESIDUE EFFECTS; FLUX RESIDUES; UNDERFILL FLOW VOIDS;

ELECTRONICS PACKAGING;

EID: 33845591633     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2006.1645688     Document Type: Conference Paper

References (15)

1. Gary L. Lehmann et al., "Underflow Process for Direct-Chip- Attachment Packaging", IEEE Transactions on Components, Packaging, and Manufacturing Technology- Part A, Vol. 21, No. 2, pp. 266-274, June, 1998.
2. Mathew K. Schwiebert and William H. Leong, "Underfill Flow as Viscous Flow Between Parallel Plates driven by Capillary Action", IEEE Transactions on Components, Packaging, and Manufacturing Technology- Part C, Vol. 19, No. 2, pp. 133-137, April, 1996.
3. Y.C. Chia et al., "A Study of Underfill Dispensing Process", The International Journal of Microcircuits and electronic Packaging, Vol. 22, No. 4, pp. 345-352, Fourth Quarter, 1999.
4. J. Wang, "Flow time measurements for underfill in flip-chip packaging", Proc. ICEP 2002 Conference, pp 221-226, Tokyo, Japan, April 17-19, 2002.
5. J. Qi, E.W. Johnson, E. Yaeger, M. Konarski, and T. Doody, "Manufacturing issues in Flip Chip on Laminate Assembly," The International Journal of Microcircuits and Eloectronic Packaging, Vol. 22, No. 3, pp. 270-279, Third Quarter, 1999.
6. H. Yamada and T. Togasaki, "Resin Flow Characteristics of Underfill Encapsulant for Flip-Chip Interconnection," IEEE Transactions on Components, Packaging, and Manufacturing Technology, Vol. 26, No. 1, pp. 268-274, March, 2003.
7. Sejin Han and K.K. Wang, "Analysis of the Flow of Encapsulant During Underfill Encapsulation of Flip-Chips," IEEE Transactions on Components, Packaging, and Manufacturing Technology - Part B, Vol. 20, No. 4, pp. 424-432, November, 1997.
8. Fine, P; Cobb, B; Best, and Nguyen, L, "Flip Chip Underfill Flow Characteristics and Prediction," IEEE Transaction on CPT, Vol., 23, No. 3, PP. 420-427, 2000.
9. Nguyen, L, et. al., "Underfill of Flip Chip on Laminates: Simulation and Validation," IEEE Transaction on CPT, Vol., 22, No. 2, PP. 168-176, 1999.
10. Wen-Bin Young and Wen-Lin Yang, "The Effect of Solder Bump Pitch on the Underfill Flow," IEEE Transactions on Components, Packaging, and Manufacturing Technology, Vol. 25, No. 4, pp. 537-542, Nov., 2002.
11. Ni, G.; Gordon, M.H.; Schmidt, W.F.; Selvam, R.P., "Flow properties of liquid underfill encapsulations and underfill process considerations", pp 101-108, ECTC 1998 Conference, May, 1998.
12. Wan, J.W., Zhang, W.J., and Bergstrom, D.J.; "18.An Analytical Model for Predicting the Underfill Flow Characteristics in Flip-Chip Encapsulation", IEEE Transactions on Advanced Packaging, Vol. 28, No. 3, pp 481-487, Aug. 2005.
13. Jinlin Wang, "Wettability analysis for C4 OLGA Package", Journal of Surface Mount Technology, Vol 14, Issue 4, 21, 2001.
14. Jinlin Wang, Marcus Hsu, Patrick Dunaway, Dongming He, and Ken Buckmann, "Methods of Underfill Flow Voids Detection and Minimization in Flip Chip Package", ECTC 2005 Conference, pp 190-195, Orlando, June, 2005.
15. Jinlin Wang and Tim Chen, "The Effect of Flow Properties on Filler Settling of Underfill in the Flip Chip Package", ECTC 2004 Conference, pp 761-766, Las Vegas, June, 2004.