Memory-conscious reliable execution on embedded chip multiprocessors

Proceedings of the International Conference on Dependable Systems and Networks

Volumn 2006, Issue , 2006, Pages 13-22

  Chen, G ^a   Kandemir, M ^a   Kolcu, I ^b  

^a The Pennsylvania State University   (United States)

^b UNIVERSITY OF MANCHESTER   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

CODES (SYMBOLS); DATA REDUCTION; DATA STORAGE EQUIPMENT; INTERCONNECTION NETWORKS; PARALLEL PROCESSING SYSTEMS;

CHIP MULTIPROCESSORS; DATA DUPLICATION; MEMORY SPACE; MEMORY STORAGE;

EMBEDDED SYSTEMS;

EID: 33845564707     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSN.2006.51     Document Type: Conference Paper

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