BSIM4 and BSIM multi-gate progress

2006 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2006 Technical Proceedings

Volumn 3, Issue , 2006, Pages 658-661

  Dunga, Mohan V ^a   Lin, Chung Hsun ^a   Xi, Xuemei ^a   Chen, S ^a   Lu, Darsen D ^a   Niknejad, Ali M ^a   Hu, Chenming ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

BSIM; Double gate MOSFETs; High k dielectrics; MOSFET modeling; Process induced strain

Indexed keywords

CARRIER MOBILITY; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; DIELECTRIC MATERIALS; MATHEMATICAL MODELS; MOSFET DEVICES; NANOTECHNOLOGY;

HIGH-K DIELECTRICS; HOLISTIC STRESS; MULTI GATE ARCHITECTURES; PROCESS INDUCED STRAIN;

GATES (TRANSISTOR);

EID: 33845225375     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)

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