Fast disjoint transistor networks from BDDs

SBCCI 2006 - 19th Symposium on Integrated Circuits and Systems Design

Volumn 2006, Issue , 2006, Pages 137-142

  Da Rosa Jr , Leomar S ^a   Marques, Felipe S ^a   Cardoso, Tiago M G ^a   Ribas, Renato P ^a   Sapatnekar, Sachin S ^b   Reis, André I ^a  

^a FEDERAL UNIVERSITY OF RIO GRANDE DO SUL   (Brazil)

^b UNIVERSITY OF MINNESOTA   (United States)

Author keywords

BDDs; CMOS gates; PTL; Switch theory; Unateness

Indexed keywords

CMOS GATES; PMOS TRANSISTORS; TRANSISTOR NETWORKS; UNATENESS;

CMOS INTEGRATED CIRCUITS; DECISION THEORY; DELAY CIRCUITS; EVALUATION; SWITCHING THEORY; TRANSISTORS;

INTEGRATED CIRCUIT LAYOUT;

EID: 33750929909     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)

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