메뉴 건너뛰기




Volumn 39, Issue 1, 2003, Pages 46-48

General design method for complementary pass transistor logic circuits

Author keywords

[No Author keywords available]

Indexed keywords

ENCODING (SYMBOLS); LOGIC DESIGN; MOSFET DEVICES; NETWORKS (CIRCUITS);

EID: 0037426902     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20030102     Document Type: Article
Times cited : (7)

References (11)
  • 1
    • 0032204641 scopus 로고    scopus 로고
    • Design of dynamic pass-transistor logic circuits using 123 decision diagrams
    • JEAKEL, A., BANDYOPADHYAH, S., and JULLIEN, A.G.: 'Design of dynamic pass-transistor logic circuits using 123 decision diagrams', IEEE Trans. Circuits Syst., 1998, 45, (11), pp. 1172-1181
    • (1998) IEEE Trans. Circuits Syst. , vol.45 , Issue.11 , pp. 1172-1181
    • Jeakel, A.1    Bandyopadhyah, S.2    Jullien, A.G.3
  • 2
    • 0034502029 scopus 로고    scopus 로고
    • A general method in synthesis of pass-transistor circuits
    • MARKOVIC, D., NIKOLIC, B., and OKLOBDZIJA, V.G.: 'A general method in synthesis of pass-transistor circuits', Microelectron. J, 2000, 31, pp. 991-998
    • (2000) Microelectron. J , vol.31 , pp. 991-998
    • Markovic, D.1    Nikolic, B.2    Oklobdzija, V.G.3
  • 4
    • 0031189144 scopus 로고    scopus 로고
    • Low-power logic styles: CMOS versus pass transistor logic
    • ZIMMERMANN, R., and FICHTNER, W.: 'Low-power logic styles: CMOS versus pass transistor logic', IEEE J. Solid-State Circuits, 1997, 32, (7), pp. 1079-1090
    • (1997) IEEE J. Solid-State Circuits , vol.32 , Issue.7 , pp. 1079-1090
    • Zimmermann, R.1    Fichtner, W.2
  • 5
    • 0032187983 scopus 로고    scopus 로고
    • Differential and pass-transistor CMOS logic for high performance systems
    • OKLOBDZIJA, V.G.: 'Differential and pass-transistor CMOS logic for high performance systems', Microelectron. J., 1998, 29, pp. 679-688
    • (1998) Microelectron. J. , vol.29 , pp. 679-688
    • Oklobdzija, V.G.1
  • 8
    • 34547369344 scopus 로고    scopus 로고
    • An efficient algorithm for low power pass transistor logic synthesis
    • SHELAR, R.S., and SAPATNEKAR, S.S.: 'An efficient algorithm for low power pass transistor logic synthesis'. VLSI Design, 2002, pp. 87-92
    • (2002) VLSI Design , pp. 87-92
    • Shelar, R.S.1    Sapatnekar, S.S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.