-
1
-
-
0032204641
-
Design of dynamic pass-transistor logic circuits using 123 decision diagrams
-
JEAKEL, A., BANDYOPADHYAH, S., and JULLIEN, A.G.: 'Design of dynamic pass-transistor logic circuits using 123 decision diagrams', IEEE Trans. Circuits Syst., 1998, 45, (11), pp. 1172-1181
-
(1998)
IEEE Trans. Circuits Syst.
, vol.45
, Issue.11
, pp. 1172-1181
-
-
Jeakel, A.1
Bandyopadhyah, S.2
Jullien, A.G.3
-
2
-
-
0034502029
-
A general method in synthesis of pass-transistor circuits
-
MARKOVIC, D., NIKOLIC, B., and OKLOBDZIJA, V.G.: 'A general method in synthesis of pass-transistor circuits', Microelectron. J, 2000, 31, pp. 991-998
-
(2000)
Microelectron. J
, vol.31
, pp. 991-998
-
-
Markovic, D.1
Nikolic, B.2
Oklobdzija, V.G.3
-
4
-
-
0031189144
-
Low-power logic styles: CMOS versus pass transistor logic
-
ZIMMERMANN, R., and FICHTNER, W.: 'Low-power logic styles: CMOS versus pass transistor logic', IEEE J. Solid-State Circuits, 1997, 32, (7), pp. 1079-1090
-
(1997)
IEEE J. Solid-State Circuits
, vol.32
, Issue.7
, pp. 1079-1090
-
-
Zimmermann, R.1
Fichtner, W.2
-
5
-
-
0032187983
-
Differential and pass-transistor CMOS logic for high performance systems
-
OKLOBDZIJA, V.G.: 'Differential and pass-transistor CMOS logic for high performance systems', Microelectron. J., 1998, 29, pp. 679-688
-
(1998)
Microelectron. J.
, vol.29
, pp. 679-688
-
-
Oklobdzija, V.G.1
-
6
-
-
0026853681
-
Low power CMOS digital design
-
CHANDRAKASAN, A.P., SHENG, S., and BRODERSEN, R.W.: 'Low power CMOS digital design', IEEE J. Solid-State Circuits, 1999, 27, (4), pp. 473-484
-
(1999)
IEEE J. Solid-State Circuits
, vol.27
, Issue.4
, pp. 473-484
-
-
Chandrakasan, A.P.1
Sheng, S.2
Brodersen, R.W.3
-
7
-
-
11744375674
-
A logic synthesis system for the pass transistor logic SPE
-
KONISHI, K., KISHIMOTO, S., LEE, B.Y., TANAKA, H., and TAKI, K.: 'A logic synthesis system for the pass transistor logic SPE'. 6th Workshop on Synth. Syst, Integ. Mixed Tech., 1996
-
(1996)
6th Workshop on Synth. Syst, Integ. Mixed Tech.
-
-
Konishi, K.1
Kishimoto, S.2
Lee, B.Y.3
Tanaka, H.4
Taki, K.5
-
8
-
-
34547369344
-
An efficient algorithm for low power pass transistor logic synthesis
-
SHELAR, R.S., and SAPATNEKAR, S.S.: 'An efficient algorithm for low power pass transistor logic synthesis'. VLSI Design, 2002, pp. 87-92
-
(2002)
VLSI Design
, pp. 87-92
-
-
Shelar, R.S.1
Sapatnekar, S.S.2
-
9
-
-
33847158948
-
Decision diagrams and pass transistor logic synthesis
-
BERTACCO, V., MINATO, S., VERPLAETSE, P., BENINI, L., and MICHELI, G.D.: 'Decision diagrams and pass transistor logic synthesis'. Int. Workshop on Logic Synthesis, 1997
-
(1997)
Int. Workshop on Logic Synthesis
-
-
Bertacco, V.1
Minato, S.2
Verplaetse, P.3
Benini, L.4
Micheli, G.D.5
-
10
-
-
0012728929
-
Performance driven synthesis for pass transistor logic
-
LIU, T.H., GANAI, M.K., AZIZ, A., and BURNS, J.L.: 'Performance driven synthesis for pass transistor logic'. Int. Workshop on Logic Synthesis, 1998, pp. 255-259
-
(1998)
Int. Workshop on Logic Synthesis
, pp. 255-259
-
-
Liu, T.H.1
Ganai, M.K.2
Aziz, A.3
Burns, J.L.4
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