SiO2Si3N4Al2O3 stacks for scaled-down memory devices: Effects of interfaces and thermal annealing

Applied Physics Letters

Volumn 89, Issue 15, 2006, Pages

  Lisiansky, M ^a   Heiman, A ^a   Kovler, M ^a   Fenigstein, A ^a   Roizin, Y ^a   Levin, I ^b   Gladkikh, A ^c   Oksman, M ^c   Edrei, R ^d   Hoffman, A ^d   Shnieder, Y ^d   Claasen, T ^e  

^a TOWER SEMICONDUCTOR LTD   (Israel)

^b NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY   (United States)

^c TEL AVIV UNIVERSITY   (Israel)

^d TECHNION ISRAEL INSTITUTE OF TECHNOLOGY   (Israel)

^e ASM   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

MEMORY CELLS; METAL-GATE INTERFACES; THERMAL ANNEALING;

ANNEALING; DATA STORAGE EQUIPMENT; ELECTRODES; INTERFACES (MATERIALS); NONVOLATILE STORAGE; OXIDATION;

SILICA;

EID: 33750015014     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.2360197     Document Type: Article

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