Effect of polysilicon gate on the flatband voltage shift and mobility degradation for ALD-Al2O3 gate dielectric

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2000, Pages 645-648

  Lee, J H ^a   Koh, K ^a   Lee, N I ^a   Cho, M H ^a   Kim, Y K ^a   Jeon, J S ^a   Cho, K H ^a   Shin, H S ^a   Kim, M H ^a   Fujihara, K ^a   Kang, H K ^a   Moon, J T ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ALUMINUM COMPOUNDS; DEPOSITION; DIELECTRIC MATERIALS; DOPING (ADDITIVES); LEAKAGE CURRENTS; POLYSILICON; THERMODYNAMIC STABILITY;

ATOMIC LAYER DEPOSITION (ALD); GATE DIELECTRIC LAYERS;

CMOS INTEGRATED CIRCUITS;

EID: 0034446678     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. 4 gate dielectric for deep sub-micron CMOS technology
2. 2 thickness
3. Effect of polysilicon gate type on the flatband voltage shift for ultrathin oxide-nitride gate stacks
4. 5 thin films
5. Electrical characterization of alumina layers depositef by evaporation cell on Si and restructured InP substrates
6. 5 on Si
7. Models for electron and hole mobilities in MOS accumulation layers