ALLCN: An Automatic Logic-to-Layout Tool for Carbon Nanotube Based Nanotechnology

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn 2005, Issue , 2005, Pages 281-288

  Zhang, Wei ^a   Jha, Niraj K ^a  

^a Princeton University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC LOGIC-TO-LAYOUT (ALLCN) TOOL; CARBON NANOTUBE FIELD-EFFECT TRANSISTORS (CNFET) CIRCUITS; DESIGN TOOLS; LOGIC BLOCKS;

CARBON NANOTUBES; COMPUTER SIMULATION; FIELD EFFECT TRANSISTORS; NANOTECHNOLOGY; NETWORKS (CIRCUITS); RESEARCH AND DEVELOPMENT MANAGEMENT;

COMPUTER AIDED LOGIC DESIGN;

EID: 33748534121     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2005.21     Document Type: Conference Paper

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