Statistical analysis and design of HARP FPGAs

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 25, Issue 10, 2006, Pages 2088-2101

  Wang, Gang ^a,b   Sivaswamy, Satish ^c   Ababei, Cristinel ^d   Bazargan, Kia ^c   Kastner, Ryan ^a,b   Bozorgzadeh, Elaheh ^a,c,e  

^a IEEE   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c UNIVERSITY OF MINNESOTA   (United States)

^d MAGMA DESIGN AUTOMATION   (United States)

^e UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Architecture; Field programmable gate arrays; Integrated circuits; Routing

Indexed keywords

LEAKAGE POWER CONSUMPTION; ROUTING; ROUTING ARCHITECTURE; ROUTING RESOURCES;

COMPUTER AIDED DESIGN; COMPUTER ARCHITECTURE; ENERGY UTILIZATION; INTEGRATED CIRCUITS; LEAKAGE CURRENTS; NATURAL FREQUENCIES; ROUTERS; STATISTICAL METHODS;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 33748308927     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2005.859485     Document Type: Article

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