Architecture-driven metric for simultaneous placement and global routing for FPGAs

Proceedings - Design Automation Conference

Volumn , Issue , 2000, Pages 567-572

  Chang, Yao Wen ^a   Chang, Yu Tsang ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CAPACITANCE; COMMUNICATION CHANNELS (INFORMATION THEORY); COMPUTER ARCHITECTURE; ELECTRIC RESISTANCE; TREES (MATHEMATICS); TWO DIMENSIONAL;

GLOBAL ROUTING; MINIMUM SPANNING TREE; STEINER TREE; SWITCH BLOCK;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0033684575     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/337292.337582     Document Type: Conference Paper

References (23)