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Volumn , Issue , 2004, Pages 401-406

Data compression for improving SPM behavior

Author keywords

Compilers; Data compression; Scratch pad memory

Indexed keywords

ALGORITHMS; BUFFER STORAGE; COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER ARCHITECTURE; COMPUTER PROGRAMMING LANGUAGES; DATA STRUCTURES; DATA TRANSFER; EMBEDDED SYSTEMS; HEURISTIC PROGRAMMING; HYBRID COMPUTERS; MICROPROCESSOR CHIPS;

EID: 4444283877     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/996566.996680     Document Type: Conference Paper
Times cited : (11)

References (21)
  • 5
    • 0001912576 scopus 로고    scopus 로고
    • Increasing energy efficiency of embedded systems by application-specific memory hierarchy generation
    • April-June
    • L. Benini, A. Macii, E. Macii, and M. Poncino. Increasing energy efficiency of embedded systems by application-specific memory hierarchy generation. IEEE Design & Test of Computers, pages 74-85, April-June, 2000.
    • (2000) IEEE Design & Test of Computers , pp. 74-85
    • Benini, L.1    Macii, A.2    Macii, E.3    Poncino, M.4
  • 6
    • 35248846809 scopus 로고    scopus 로고
    • Hardware-assisted data compression for energy minimization in systems with embedded processors
    • Paris, France, March
    • L. Benini, D. Bruni, A. Macii, and E. Macii. Hardware-assisted data compression for energy minimization in systems with embedded processors. In Proc. DATE'02, Paris, France, March 2002.
    • (2002) Proc. DATE'02
    • Benini, L.1    Bruni, D.2    Macii, A.3    Macii, E.4
  • 8
    • 8644257116 scopus 로고    scopus 로고
    • Motorola Corporation
    • CPU 12 Reference Manual. Motorola Corporation, 2000. http://motorola.com/brdata/PDFDB/MICROCONTROLLERS/16_BIT/68HC12_FAMILY/REF_MAT/ CPU12RM.pdf.
    • (2000) CPU 12 Reference Manual
  • 13
    • 0033359006 scopus 로고    scopus 로고
    • Instruction fetch energy reduction using loop caches for embedded applications with small tight loops
    • San Diego, CA, August
    • L. H. Lee, B. Moyer and J. Arends. Instruction fetch energy reduction using loop caches for embedded applications with small tight loops. In Proc. International Symposium on Low Power Electronic Design, San Diego, CA, August, 1999.
    • (1999) Proc. International Symposium on Low Power Electronic Design
    • Lee, L.H.1    Moyer, B.2    Arends, J.3
  • 14
    • 84862411072 scopus 로고    scopus 로고
    • http://www.oberhumer.com/opensource/lzo/
  • 15
    • 0005598762 scopus 로고    scopus 로고
    • Motorola Corporation
    • M-CORE - MMC2001 Reference Manual. Motorola Corporation, 1998. http://www.motorola.com/SPS/MCORE/info_documentation.htm.
    • (1998) M-core - MMC2001 Reference Manual
  • 16
    • 0030686025 scopus 로고    scopus 로고
    • Efficient utilization of scratch-pad-memory in embedded processor applications
    • Paris, March
    • P. R. Panda, N. D. Dutt, and A. Nicolau. Efficient utilization of scratch-pad-memory in embedded processor applications. In Proc. European Design and Test Conference, Paris, March 1997.
    • (1997) Proc. European Design and Test Conference
    • Panda, P.R.1    Dutt, N.D.2    Nicolau, A.3
  • 17
    • 85086811822 scopus 로고    scopus 로고
    • Reducing energy consumption by dynamic copying of instructions onto on-chip memory
    • Kyoto, Japan, October
    • S. Steinke et al. Reducing energy consumption by dynamic copying of instructions onto on-chip memory. In Proc. ISSS'02, Kyoto, Japan, October 2002.
    • (2002) Proc. ISSS'02
    • Steinke, S.1
  • 18
    • 84862422113 scopus 로고    scopus 로고
    • Revised February
    • TMS370Cx7x 8-bit Microcontroller. Texas Instruments, Revised February 1997. http://www-s.ti.com/sc/psheets/spns034c/spns034c.pdf.
    • (1997) Texas Instruments
  • 20
    • 84957036203 scopus 로고    scopus 로고
    • Optimizing on-chip memory usage through loop restructuring for embedded processors
    • March 30-31 , Berlin, Germany
    • L. Wang, W. Tembe, and S. Pande. Optimizing on-chip memory usage through loop restructuring for embedded processors. In Proc. 9th International Conference on Compiler Construction, March 30-31 2000, pp. 141-156, Berlin, Germany.
    • (2000) Proc. 9th International Conference on Compiler Construction , pp. 141-156
    • Wang, L.1    Tembe, W.2    Pande, S.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.