Rapid generation of custom instructions using predefined dataflow structures

Microprocessors and Microsystems

Volumn 30, Issue 6, 2006, Pages 355-366

  Lam, Siew Kei ^a   Srikanthan, Thambipillai ^a   Clarke, Christopher T ^b  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b University of Bath   (United Kingdom)

Author keywords

FPGA; Instruction customization; Methodology; Reconfigurable processors

Indexed keywords

BENCHMARKING; COMPUTER HARDWARE; FIELD PROGRAMMABLE GATE ARRAYS; PROGRAM PROCESSORS;

INSTRUCTION CUSTOMIZATION; METHODOLOGY; RECONFIGURABLE PROCESSORS;

DATA FLOW ANALYSIS;

EID: 33745973319     PISSN: 01419331     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.micpro.2006.02.012     Document Type: Article

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