Thread-level speculation on a CMP can be energy efficient

Proceedings of the International Conference on Supercomputing

Volumn , Issue , 2005, Pages 219-228

  Renau, Jose ^a   Strauss, Karin ^b   Ceze, Luis ^b   Liu, Wei ^b   Sarangi, Smruti ^b   Tuck, James ^b   Torrellas, Josep ^b  

^a University of California Santa Cruz   (United States)

^b University of Illinois at Urbana Champaign   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP MULTIPROCESSORS (CMP; DYNAMIC ENERGY CONSUMPTION; MINIMAL PERFORMANCE IMPACT; THREAD-LEVEL SPECULATION;

ELECTRIC POWER UTILIZATION; MULTIPROCESSING SYSTEMS;

ENERGY EFFICIENCY;

EID: 32844469955     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1088149.1088178     Document Type: Conference Paper

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