Device characterizations and physical models of strained-Si channel CMOS

IEEE International Conference on Microelectronic Test Structures

Volumn , Issue , 2004, Pages 133-138

  Takagi, S ^a,b   Maeda, T ^a   Numata, T ^c   Mizuno, T ^c   Usuda, K ^c   Tanabe, A ^c   Tezuka, T ^c   Nakaharai, S ^c   Koga, J ^c   Irisawa, T ^c   Moriyama, Y ^c   Hirashita, N ^c   Sugiyama, N ^c  

^a TOSHIBA CORPORATION   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

^c NONE

Author keywords

[No Author keywords available]

Indexed keywords

DIFFUSION; EPITAXIAL GROWTH; HETEROJUNCTIONS; IMPURITIES; IONIZATION; OXIDATION; SILICON; THERMAL CONDUCTIVITY;

BAND DIAGRAMS; CONDUCTION BANDS; GATE OXIDES; VALANCE BANDS;

CMOS INTEGRATED CIRCUITS;

EID: 3042513288     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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