Chip-scale modeling of electroplated copper surface profiles

Journal of the Electrochemical Society

Volumn 151, Issue 6, 2004, Pages

  Park, Tae ^a   Tugbawa, Tamba ^a   Boning, Duane ^a   Chidambaram, Chidi ^b   Borst, Chris ^b   Shin, Gregg ^b  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^b TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL MECHANICAL POLISHING; ELECTROPLATING; INTEGRATED CIRCUITS; MASKS; METALLIZING; SURFACE PHENOMENA; SURFACE TOPOGRAPHY;

CHIP-SCALE MODELING; CURRENT PLANARIZATION TECHNOLOGY; DISCRETIZATION; ELECTROPLATED TOPOGRAPHY;

COPPER PLATING;

EID: 2942687791     PISSN: 00134651     EISSN: None     Source Type: Journal    
DOI: 10.1149/1.1723496     Document Type: Article

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